Integrated circuit with re-route layer and stacked die assembly

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Assembly of plural semiconductive substrates each possessing...

Reexamination Certificate

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Details

C438S107000, C438S118000, C438S119000, C438S618000, C438S667000

Reexamination Certificate

active

07422930

ABSTRACT:
An apparatus and a method of manufacture for a stacked-die assembly. A first die is placed on a substrate such that the backside of the die, i.e., the side opposite the side with the bond pads, is coupled to the substrate, preferably by an adhesive. Wire leads electrically couple the bond pads of the first die to contacts on the substrate. A second die is placed on the first die, and wire leads electrically couple the bond pads of the second die to contacts on the substrate. Preferably, a spacer is placed between the first die and the second die. Additional dies may be stacked on the second die.

REFERENCES:
patent: 4439841 (1984-03-01), Itoh et al.
patent: 6291881 (2001-09-01), Yang
patent: 6492198 (2002-12-01), Hwang
patent: 6495442 (2002-12-01), Lin et al.
patent: 6514794 (2003-02-01), Haba et al.
patent: 6555917 (2003-04-01), Heo
patent: 6560117 (2003-05-01), Moon
patent: 6569762 (2003-05-01), Kong
patent: 6582992 (2003-06-01), Poo et al.
patent: 6607938 (2003-08-01), Kwon et al.
patent: 6611052 (2003-08-01), Poo et al.
patent: 6621169 (2003-09-01), Kikuma et al.
patent: 6633183 (2003-10-01), Duesman
patent: 6650008 (2003-11-01), Tsai et al.
patent: 6943294 (2005-09-01), Kang et al.
patent: 2003/0020151 (2003-01-01), Chen et al.
patent: 2003/0034563 (2003-02-01), Reyes et al.
patent: 2003/0057539 (2003-03-01), Koopmans
patent: 2003/0107119 (2003-06-01), Kim
patent: 2003/0153122 (2003-08-01), Brooks
patent: 2003/0160312 (2003-08-01), Lo et al.
patent: 2003/0203537 (2003-10-01), Koopmans
patent: 2003/0227079 (2003-12-01), Chia et al.
patent: 2004/0126927 (2004-07-01), Lin et al.
patent: 2005/0045378 (2005-03-01), Heng et al.
patent: 101 46 176 (2003-04-01), None
patent: 0 993 045 (2000-04-01), None

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