Electricity: measuring and testing – Measuring – testing – or sensing electricity – per se – With rotor
Reexamination Certificate
2002-04-04
2004-11-02
Cuneo, Kamand (Department: 2829)
Electricity: measuring and testing
Measuring, testing, or sensing electricity, per se
With rotor
C324S765010
Reexamination Certificate
active
06812690
ABSTRACT:
FIELD OF THE INVENTION
The invention relates to testing of connections to an integrated circuit that is mounted on a carrier.
BACKGROUND ART
From U.S. Pat. No. 5,963,038 it is known to provide a magnetic field sensor in an integrated circuit chip to test whether a power supply connection of the chip carries current.
Modern integrated circuit chips have many power supply connections. It is expected that in the near future more than 30% of the available connections to integrated circuit chips will involve power supply connections. This abundance of power supply connections poses a serious test problem, because the power supply connections tend to be interconnected outside and inside the chip. As a result, failure of a power supply connection does not always show up as a significant voltage drop of the power supply voltage inside the chip, or anywhere else, and so detection of the absence or presence of a supply voltage is no answer to the test problem. Also the chip processes data normally under most circumstances when one or a few of the power supply connections fail, so that the failure does not always show up in functional tests (tests that check whether test data is processed properly).
This has led to the proposal of techniques to perform testing by measuring currents through the power supply connections. One technique is to measure the voltage drop over a resistance in the supply path. The circuitry for such a measurement impose strict circuit requirements because such a resistance would either have to be very small or lead to a reduced supply voltage.
An alternative technique is to detect a magnetic field generated by the current through a power supply connection. U.S. Pat. No. 5,399,975 teaches the use of a probe that is held near to a power supply connection for the purpose of this test. However, this technique is cumbersome, because it requires special probes and accurate positioning of these probes. Moreover, this technique does not work when the current paths to the power supply connections are not individually accessible from outside the IC package, for example when they are underneath the IC package, between the package and a printed circuit board. Use of an external probe to access individual current paths is also impossible when a chip is packaged together with an interposer circuit on which connections are made between different power supply connections and possibly to other chips mounted on the same interposer circuit.
U.S. Pat. No. 5,963,038 solves this problem by integrating magnetic field sensors on the integrated circuit chip in the vicinity of a current paths from the various power supply connections. By integrating the sensors on chip it becomes straightforward to place the sensors in positions where they can detect currents and it becomes economically feasible to include a great number of sensors, each for a specific power supply connection.
The sensors may be implemented for example using magneto-resistive material deposited on the chip or by patterning conductor tracks on chip as pick-up coils. The sensors are connected to on-chip test circuitry to perform current detection and to report the result of the current detection on a test output (for example a scan chain interface).
Although U.S. Pat. No. 5,963,038 solves the problem of testing the operation of individual power supply connections, it has been found that the described sensors cannot always be realized. A pick-up coil does not operate satisfactorily on (semi-) conducting substrates (such as a silicon substrate). Magneto-resistive materials are not always compatible with materials used for integrated circuit chip manufacture. Moreover, when a power supply network is provided on a carrier outside the integrated circuit chip, and this network provides for alternative power supply routes, the sensors of U.S. Pat. No. 5,963,038 are not suitable for detecting disruptions in power supply routes in this network.
SUMMARY OF THE INVENTION
Amongst others, it is an object of the invention to provide for an alternative way testing of current paths through power supply connections of an integrated circuit chip, notably a way of testing which does not result in incompatibility with integrated circuit manufacturing technology.
It is another object of the invention to provide for testing current paths through power supply connections of an assembly of integrated circuit chips of which not all integrated circuit chips contain provisions for such testing.
It is yet another object of the invention to provide for testing current paths through power supply connections on a carrier for integrated circuit chips.
The invention provides for an integrated circuit assembly, comprising
a semi-conductor integrated circuit chip with a power supply connection;
a carrier to which the integrated circuit chip is attached;
an external power supply terminal;
a current path on the carrier, connecting the external power supply terminal and the power supply connection;
a magnetic field sensor on the carrier in a vicinity of the current path, but outside the integrated circuit chip, for sensing a magnetic field generated by a current through the current path;
a test-accessible electronic interface to the magnetic field sensor, for testing presence of the current.
By placing magnetic field sensors on the carrier, the problems of integrating such sensors in the integrated chip is solved. Moreover, this enables the testing of individual connections on the carrier.
An interposer, on which one or more integrated circuit chips are packaged before assembly on a printed circuit board has been found to be a suitable carrier for integrating magnetic field sensors. The power supply paths to the power supply connections of the integrated circuit chip are well accessible for sensors on the interposer, because these paths run on the interposer. Moreover, since the interposer is manufactured separately from the integrated circuit chip, only to be attached to the completed chip, its manufacture is not incompatible with that of the chip.
Preferably, the magnetic field sensors are integrated on the carrier, that is, they are not pre-manufactured sensors solder onto the carrier, but sensors that are manufactured on the carrier. It has been realized that techniques that have been developed to manufacture heads for magnetic recording (see for example U.S. Pat. No. 4,321,640 (applicants ref PHN 9107), U.S. Pat. No. 4,686,472 (applicants ref PHN 10016) or U.S. Pat. No. 4,052,748 (applicants ref PHN 7469) and the references cited therein) can be readily applied to integrated manufacture of carriers with many magnetic sensors at low cost. In particular, photolithographic patterning of magnetoresistive material is suitable for realizing a large number of magnetic sensors on a carrier. However, other kinds of magnetic field sensors, such as pick up coils or Hall effect sensors may also be integrated on the carrier.
Preferably, individual sensors are provided for a plurality of power supply conductors of the same power supply potential, for one or more different power supply potentials (e.g. 3.3 V and ground) and for one or more different integrated circuit chips. In an embodiment, a number magneto-resistive elements used as sensors are connected electrically in series so that their resistance can be determined using a common current source and shared tap points between successive magneto-resistive elements.
There are many advantageous embodiments of reading the magnetic sensors. In a first embodiment, sensor results are read into the integrated circuit chip, or into another integrated circuit chip mounted on the same carrier (preferably the same interposer), processed in that chip and output via a test output of that chip. Thus, the test can be handled substantially within the assembly of chip (or chips) and carrier, at a small cost of additional circuits on chip. In a second embodiment, the interposer contains a circuit for reading and outputting test results outside the chip, preferably using a scan chain interface. Thus, no additional access pads are neede
De Jong Franciscus Gerardus Maria
De Wilde Johannes
Schuttert Rodger Frank
Cuneo Kamand
Koninklijke Philips Electronics , N.V.
Nguyen Tung X.
Ure Michael J.
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