Integrated circuit with peripheral test controller

Details Integrated circuit with peripheral test controller Integrated circuit with peripheral test controller

1991-12-06

1995-03-07

Atkinson, Charles E.

Excavating

371 225, 371 211, G06F 1100

Patent

active

053964985

ABSTRACT:
The instant invention relates to complex integrated circuits incorporating circuits for internal testing. The test controller has:

REFERENCES:
patent: 4764926 (1988-08-01), Knight et al.
patent: 4910734 (1990-03-01), Segawa et al.
patent: 4964148 (1990-11-01), Nadeau-Dostie et al.
patent: 5048021 (1991-09-01), Jarwala et al.
patent: 5132973 (1992-07-01), Obermeyer
patent: 5218680 (1993-06-01), Farrell et al.
patent: 5230000 (1993-07-01), Mozingo et al.
patent: 5257231 (1993-10-01), Masuda
A. T. Dahbura et al.: "An Optimal Test Sequence for the JTAG/IEEE P1149.1 Test Access Port Controller", 1989 IEEE, pp. 56-60.
1989 IEEE Int'l Conf. on Computer Design: VLSI in Computers & Processors, Y. Zorian et al., "Designing fault-tolerant testable, VLSI processors using the IEEE P1149.0 Boundary-scan Architecture", p. 581.

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