Integrated circuit with offset pins

Details Integrated circuit with offset pins Integrated circuit with offset pins

2006-05-30

2006-05-30

Le, Dung A. (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

With contact or lead

C257S692000, 63

Reexamination Certificate

active

07053480

ABSTRACT:
The invention relates to the fabrication and testing of a chip with a package (2) having connecting pins (1) as well as to mounting the package (2) on a board (5), whereby in order to combine the advantages of a package (2) with inline connecting pins (1) with the advantages of a package (2) with offset connecting pins (11, 12), the package (2) is fabricated with inline connecting pins (1) and inserted into a test socket (3) for testing. Immediately before mounting on the board (5), at least one connecting pin, preferably every second connecting pin (12), of the package (2) is bent inward by a bending tool (6) so as to achieve an offset arrangement of the connecting pins (11, 12). The package (2) is preferably mounted on the board (5) using the bending tool (6). A simple, inexpensively produced test socket (3) is sufficient for the purpose of testing the chip. An inexpensively produced guide brace (4), for example, is suitable as a packaging means. Since every second connecting pin (12) is not bent inward immediately before insertion of the connecting pins (11,12), no subsequent corrective alignment of the offset connecting pins (11, 12) is required.

REFERENCES:
patent: 3416348 (1968-12-01), Carter, Jr. et al.
patent: 4557043 (1985-12-01), Starski
patent: 4941248 (1990-07-01), Seidel et al.
patent: 5585281 (1996-12-01), Truhite et al.
patent: 5675884 (1997-10-01), Horton et al.
patent: 5889658 (1999-03-01), Sullivan et al.
patent: 6134111 (2000-10-01), Kinsman et al.
Datasheet for Telefunken, TCA 830, Telefunken, pp. 29-32; Mar. 16, 1998.

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