Integrated circuit with non-volatile, variable resistor, for use

Static information storage and retrieval – Magnetic bubbles – Guide structure

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36518505, H01L 2986

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active

054577713

ABSTRACT:
Integrated circuit with a non-volatile variable resistor which is particularly adapted for use in a neuronic network. The integrated circuit comprises a symmetrically replicated structure including a floating gate MOS transistor (TRP; TRN) and an EEPROM memory cell based upon N-channel MOS transistors and including a read-out MOS transistor (TSP; TSN) and a tunnel-effect charge injection MOS element (TUNP; TUNN), with floating gates. The floating gates of all transistors and of the tunnel-effect element are connected together, with the ends of the resistor (R1P, R2P; R1N, R2N) being taken out from the source and drain regions of the floating gate MOS transistor.

REFERENCES:
patent: 4782460 (1988-11-01), Spencer
patent: 4935648 (1990-06-01), Radiy et al.
patent: 5021693 (1991-06-01), Shima
patent: 5055897 (1991-10-01), Canepa et al.
patent: 5065132 (1991-11-01), Taddiken et al.
Scott, Donald E.; "An Introduction to Circuit Analysis"; .COPYRGT.1987 by McGraw-Hill, Inc.; pp. 316, 320-321.

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