Integrated circuit with mode detection pin for tristate level de

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307303, 307473, 307465, H03K 19092, H03K 1900

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active

051987074

ABSTRACT:
To enable a determined mode of operation, out of several possible modes, to be dictated from the exterior of an integrated circuit, there is provided a specific pin and a detector that is connected to the pin and is capable of detecting a logic level 0 or 1 or a high impedance state at this pin. The detector includes several switches and a resistor. It works in two successive phases and consumes no current at rest. A register memorizes the logic level of the pin during the two phases, and a decoder determines the state of the pin from the two memorized logic levels.

REFERENCES:
patent: 4005315 (1977-01-01), Blauschild
patent: 4100429 (1978-07-01), Adachi
patent: 4115706 (1978-09-01), Yamaguchi
patent: 4837505 (1989-06-01), Mitsunobu
patent: 4982427 (1991-01-01), Nicolai
"An Engineering Approach to Digital Design", William Fletcher, Prentice Hall, 1980, pp. 18-19.
"Hard Wired Information with Three Voltage Levels", IBM Technical Disclosure Bulletin, vol. 22, No. 5, Oct. 1979, Garcsa et al.

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