Patent
1989-05-22
1990-09-11
Wojciechowicz, Edward J.
357 238, 357 2312, H01L 2978
Patent
active
049567004
ABSTRACT:
A power transistor structure (10) is formed on an n+ substrate (12). A p- epitaxial layer (16) is formed on the substrate (12) and has an upper surface (19). An n+ source region (26) extends from the upper surface (19) into the epitaxial layer (16). An n-type drain region (22, 24) is spaced from the source region (26) and extends from the upper surface (19) through the epitaxial layer (16) to the substrate (12). An insulating layer (28) on the upper surface (19) extends between the source region (26) and the drain region (22, 24). A conductive gate electrode (34) on the insulating layer (28) extends between the source region (26) and the drain region (22, 24). A conductive electrode (30) is electrically connected to the source region (26). Another conductive electrode (36) is electrically connected to the substrate (12).
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Grove, A., Physics and Technology of Semiconductor Devices, John Wiley, 1967, pp. 330-331.
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Blanchard Richard A.
Williams Richard K.
Crang Sara W.
Siliconix incorporated
Wojciechowicz Edward J.
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