Integrated circuit with enhancement mode pseudomorphic high...

Details Integrated circuit with enhancement mode pseudomorphic high... Integrated circuit with enhancement mode pseudomorphic high...

2006-01-10

2006-01-10

Wilson, Allan R. (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Heterojunction device

Field effect transistor

C257S192000, C438S167000, C438S172000

Reexamination Certificate

active

06984853

ABSTRACT:
An integrated circuit (IC) with high electron mobility transistors, such as enhancement mode pseudomorphic high electron mobility transistors (E-pHEMTs) and method for fabricating the IC utilizes an increased gate-to-drain etch recess spacing in some of the high electron mobility transistors to provide on-chip electrostatic discharge protection. The use of the increased gate-to-drain etch recess spacing allows smaller high electron mobility transistors to be used for ancillary low speed applications on the IC, which reduces the chip area occupied by these ancillary transistors.

REFERENCES:
patent: 5030852 (1991-07-01), Higashisaka
patent: 5084743 (1992-01-01), Mishra et al.
patent: 5304825 (1994-04-01), Vaitkus et al.
patent: 5633610 (1997-05-01), Maekawa et al.
patent: 6294801 (2001-09-01), Inokuchi et al.
patent: 6537865 (2003-03-01), Inokuchi et al.

Affiliated with

Also associated with

Rating

Integrated circuit with enhancement mode pseudomorphic high... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Integrated circuit with enhancement mode pseudomorphic high..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Integrated circuit with enhancement mode pseudomorphic high... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3557233