Data processing: structural design – modeling – simulation – and em – Emulation – In-circuit emulator
Reexamination Certificate
1998-02-06
2001-09-11
Teska, Kevin J. (Department: 2123)
Data processing: structural design, modeling, simulation, and em
Emulation
In-circuit emulator
C703S023000, C710S007000, C714S030000, C714S035000
Reexamination Certificate
active
06289300
ABSTRACT:
TECHNICAL FIELD
The present invention relates to an integrated circuit having an emulator embedded therein, and to an emulation system for use with such an integrated circuit.
BACKGROUND OF THE INVENTION
Executable code for a data processor such as a microcontroller, requires testing and correction during its development cycle. Software debugging is initially done in a simulator or debugger offline. Once the software is debugged, it is then down loaded into the target system. However, if the software does not work correctly, for example, due to a timing problem it is then necessary to do an “in circuit” examination of the software and the data that it is manipulating. It is known to perform this by removing the target data processor and replacing it with a replica of the data processor which can be probed or interrogated via an emulation pod. The replica data processor emulates the real data processor and this process is called “in circuit emulation”.
A disadvantage of known “in circuit” emulators is that the additional sockets, clips, adaptors or pods can induce extra parasitic components into the target system which alter its performance. This usually restricts the emulation to a slow speed in order to avoid timing problems introduced by the parasitic components. The use of such in circuit emulators can cause problems where debugging is to be performed in hybrid digital-analogue systems where analogue accuracy is a critical issue, especially when more than 6 or 7 bit resolution of analogue variables is used.
It was also known, in the cases of microcontrollers where the internal address and data busses do not come out to the pins of the data processor, to produce a special “bond-out” version of the circuit. This has to be manufactured into a bigger package to bring these extra signals to the pins so that the emulator can monitor them. The bond-out version is disadvantageous since it requires the chip manufacturer to create a second version of the chip and package, with consequent timing differences from the real chip, increased complexity, and a need to provide an adaptor for connecting the “bond-out” version of the chip to target systems in place of the standard chip package.
It is known to integrate emulation address comparators and emulsion break point registers within an integrated circuit and then to perform a hardware compare of the contents of the address register with the emulation break point register in order to determine when to force a break point for emulation purposes. However, the additional registers and comparators are wasteful of space on the silicon die of the integrated circuit, and are inflexible in the operation. An additional register and comparator is required for each break point. Typically a designer may wish to have between eight and sixteen break points available. The addition of sixteen or so additional registers and comparators can add a significant cost to the production cost of the integrated circuit.
SUMMARY OF THE INVENTION
According to a first aspect of the present invention, there is provided a data processor including an emulation controller for causing the data processor to enter an emulation mode, and dedicated registers for use in the emulation mode.
It is thus possible to provide a software driven emulator within a data processor which leaves the registers used by the data processor to execute tasks unaltered during an emulation or debug operation. A software driven emulator is flexible and allows, for practical purposes, for an unlimited number of break points to be implemented.
Preferably the registers dedicated for use by a data processing core (also known as an arithmetic logic unit) of the data processor during emulation can only be altered during emulation.
Advantageously a programme for controlling the operation of the data processing core during emulation is stored in a reserved non-volatile memory area which is hidden from the user of the data processor.
Preferably the emulation controller can operate in a single step mode wherein the register status of the data processor, or other information such as the contents of a stack or memory can be output after executing a single instruction of the user's programme. Additionally or alternatively, the emulation controller is responsive to a single byte instruction placed in the user code in order to initiate the emulation mode. The single byte instruction is, in general written over another instruction in the user's programme. In order to ensure that the user's program performs as intended, the overwritten instruction is held in a special purpose register so that it is executed when the emulation mode is exited. Additionally or alternatively, the data processor may also be responsive to a signal on one of the data processor control pins in order to initiate the emulation mode.
According to a second aspect of the present invention, there is provided a data processor having an emulator embedded therein, and in which the emulator is initiated by a single word instruction.
According to a further aspect of the present invention, there is provided a data processor including an emulator therein arranged to communicate information concerning the internal status of the data processor via a serial communication link.
Preferably the serial data link utilises a pin in the data processor package. Advantageously the pin is multiplexed with a control function of the data processor. For example, some data processors include control pins which are only relevant during the power up initialisation of the data processor. The pin may indicate to the processor whether it is to initially execute instructions from an internal or an external memory. Once this information has been conveyed to the processing core of the data processor the pin becomes effectively redundant. Such a pin may then be used as a communication link between the embedded emulation system within the data processor and an external development system or emulator controller.
Preferably the emulator is responsive to a signal on the pin, such as a voltage transition, in order to activate the emulator.
Preferably the emulator is a software controlled emulator, and comprises emulation instructions held as software within a reserved memory integrated into the data processor. The receipt of the instruction to start emulsion, either by a signal on the emulator control pin or via a software instruction within the software being debugged, forces the data processing core of the data processor to suspend execution of the user's programming code and to execute instructions from the emulation instruction code. Preferably the receipt of an instruction to commence emulation causes a high level non maskable interrupt to be issued to the data processing core of the data processor.
Preferably the data processor executes emulation instructions using reserved emulation registers, thereby leaving the contents of the registers used for programme code execution unaltered, except possibly for the programme address controller and the stack which may experience some minor and wholly reversible alterations. Advantageously an auxiliary stack and/or auxiliary programme address counters may also be provided solely for use within the emulation routine such that the registers, programme counter and stack used by user executable code may be left entirely unaltered. As an alternative dedicated registers may also be provided for storing the contents of the program address controller. In yet a further alternative, the data processor may be arranged to down load the stack and register contents to virtual registers with an emulator control data processor or within an interface element, and to up load the register and stack contents when exiting the emulation mode. According to a further aspect of the present invention, there is provided a development system comprising a control data processor for monitoring the status of a target data processor, wherein the target data processor includes an embedded emulator for communicating information concerning the inter
Brannick Dara Joseph
Cummins Timothy J.
Mitchell Patrick Michael
O'Mara Brian John
Analog Devices Inc.
Sergent Douglas W.
Teska Kevin J.
Wolf Greenfield & Sacks P.C.
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