Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – With pn junction isolation
Patent
1993-03-01
1994-04-12
Mintel, William
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
With pn junction isolation
257565, 257592, H01L 2702
Patent
active
053028481
ABSTRACT:
A process for making an integrated-circuit (IC) chip with junction-isolated complementary bipolar transistors, and a novel chip made by such a process. P-type dopant is implanted and diffused in an N-type substrate to form a sub-collector for a pnp transistor and also is implanted and diffused in the substrate to form a P-well for the sub-collector of an npn transistor. N-type material is then implanted and diffused into the P-well to form the npn sub-collector, and also is implanted in the substrate to form part of an isolation wall for the pnp transistor. A P-type epitaxial (epi) layer is grown over the N-type substrate. N-type material is implanted and diffused in the epi layer to complete the isolation wall for the pnp transistor, and to form the collector for the npn transistor. P-type and N-type material is implanted and diffused in the P-type epi layer to form the bases and emitters for the npn and pnp transistors.
REFERENCES:
patent: 3524113 (1970-08-01), Agusta et al.
patent: 4357622 (1982-11-01), Magdo et al.
Lapham Jerome F.
Scharf Brad W.
Analog Devices Inc.
Mintel William
Potter Roy
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