Integrated circuit with borderless contacts

Details Integrated circuit with borderless contacts Integrated circuit with borderless contacts

1999-06-08

2001-05-08

Nelms, David (Department: 2818)

Semiconductor device manufacturing: process

Chemical etching

Vapor phase etching

C438S740000

Reexamination Certificate

active

06228777

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to integrated circuits and a method for making them.
BACKGROUND OF THE INVENTION
To continue adding transistors to integrated circuits without significantly increasing die sizes, the distance between transistors and other devices may have to be reduced. The need to reduce the distance between devices may require reducing the width of the landing area for the contacts. As a result, when contact is made to the landing area, part of the contact may extend laterally over the isolation structure, forming a borderless contact. To prevent the contact etch step from etching into the isolation structure, an etch stop layer may be formed on the surface of the device prior to performing the contact etch. Such a layer may comprise silicon nitride.
In conventional devices, which do not include borderless contacts, an interlayer dielectric (“ILD”) that includes a silicon dioxide, PSG, or BPSG layer is frequently formed on a silicide. The presence of that layer, and the processes used to deposit and etch it, give the resulting device certain properties. When a silicon nitride layer is formed between the silicide and such an ILD layer, for enabling borderless contacts, the silicon nitride layer (and processes used to form and etch it) may cause the resulting device's characteristics to differ from those of a device that lacks such a layer.
Some of those changes may be undesirable. For example, adding such a silicon nitride layer may introduce certain stresses that can degrade the saturation current or cause the device's threshold voltage to shift. Depositing a silicon nitride layer directly on top of a silicide may increase the silicide's sheet resistance and adversely affect the way the silicide agglomerates. When using a plasma process to remove silicon nitride, different charging characteristics may result, when compared to those that result when etching the ILD layer. Also, when such a silicon nitride etch stop layer is deposited using a hot wall chemical vapor deposition (“CVD”) process, significant portions of the silicide may oxidize.
Accordingly, there is a need for a method for making a device having borderless contacts that mitigates against the type of device characteristic changes and performance degradation that the silicon nitride etch stop layer may cause. In particular, there is a need for a device that is not adversely affected by stresses, unwanted changes to silicide properties, or undesirable charging effects, which may result from forming such a layer. There is also a need for a process for making a device that includes such a silicon nitride layer that permits use of a hot wall CVD process to deposit such a layer, without causing significant oxidation of the silicide.
SUMMARY OF THE INVENTION
The present invention covers an integrated circuit comprising a conductive region formed on a semiconductor substrate, a silicate glass layer formed on the conductive region, and an etch stop layer formed on the silicate glass layer. The integrated circuit also includes a borderless contact that is coupled to the conductive region. The present invention further covers a method for forming such an integrated circuit.


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