Integrated circuit with an active-level configurable and method

Details Integrated circuit with an active-level configurable and method Integrated circuit with an active-level configurable and method

1993-04-19

1995-05-09

Callahan, Timothy P.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Particular stable state circuit

327 43, 327407, 326 46, H03K 19003

Patent

active

054143802

ABSTRACT:
An integrated circuit (20) configures the active level of an input, output, or input/output pin by sensing a logic state on the pin's bonding pad (21) at the inactivation of a reset signal, such as a power-on reset signal. The integrated circuit (20) selects a true or complement signal to provide to or from an internal circuit (25). The voltage level on the pin is latched on the active-to-inactive transition of the power-on reset signal. Thus, the use of proper board-level termination resistors (70, 71) programs the pins to the desired active logic level without the need for additional logic circuitry or a dedicated device pin.

REFERENCES:
patent: 4029900 (1977-06-01), Addeo
patent: 4138613 (1979-02-01), Tanaka
patent: 4783606 (1988-11-01), Goetting
patent: 4900949 (1990-02-01), Saitoh
patent: 4933575 (1990-06-01), Aso
patent: 4940909 (1990-07-01), Mulder et al.
patent: 4987319 (1991-01-01), Kawana
patent: 5025174 (1991-06-01), Shikata
patent: 5029272 (1991-07-01), Fourcroy et al.
patent: 5072137 (1991-12-01), Slemmer
patent: 5148052 (1992-09-01), Yellamilli
patent: 5166545 (1992-11-01), Harrington

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