Integrated circuit wafer with inter-die metal interconnect...

Active solid-state devices (e.g. – transistors – solid-state diode – Physical configuration of semiconductor – With peripheral feature due to separation of smaller...

Reexamination Certificate

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C257SE21523, C257SE21524

Reexamination Certificate

active

11171510

ABSTRACT:
A metal interconnect structure formed over a substrate in an integrated circuit that traverses a scribe-line boundary between a first die and a second die includes at least one metal interconnect line that traverses the scribe-line boundary. A switch is coupled between the at least one metal interconnect line and the substrate, the switch having a control element coupled to a scribe-cut control line. The control line turns the switch on if the two dice are separated into individual dice and turns the switch off if the two dice are to remain physically connected so that the interconnect line may be used to make connections between circuits on the two dice.

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patent: 2006/0118959 (2006-06-01), Yamagata
Anonymous, “3D Integration for Mixed Signal Applications,” Ziptronix, Inc., 4 pages, 2002, no month.
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T. Makimoto, Ph. D., “New Opportunities in the Chip Industry,” Semico Summit 2004, Scottsdale, Arizona, 40 pages, Mar. 14-16, 2004.

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