Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons
Patent
1989-11-14
1991-10-22
Miller, Stanley D.
Electrical transmission or interconnection systems
Nonlinear reactor systems
Parametrons
307443, 307451, 307304, 307480, H03K 1902, H03K 19096
Patent
active
050598309
ABSTRACT:
A bus driver in which at least two P channel MOS transistors and at least two N channel MOS transistors are employed and these are respectively connected in series. A data signal is inputted into a gate of one of the P channel MOS transistors, an inverted input of an enable signal is inputted into a gate of the other of the P channel MOS transistors, the enable signal is inputted into a gate of one of the N channel MOS transistors and the data signal is also inputted into a gate of the other of the N channel MOS transistors. Further, an output signal is outputted from a connection point of the P channel MOS transistors and the N channel MOS transistors. Also disclosed is another embodiment of a bus driver in which an inverted signal of an enable signal is inputted into the other of the P channel MOS transistors through an inverter.
REFERENCES:
patent: 4920282 (1990-04-01), Muraoka et al.
Kudou Tsuneaki
Omote Kazuyuki
Tokumaru Takeji
Kabushiki Kaisha Toshiba
Miller Stanley D.
Wambach Margaret Rose
LandOfFree
Integrated circuit using bus driver having reduced area does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Integrated circuit using bus driver having reduced area, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Integrated circuit using bus driver having reduced area will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-110513