1986-05-20
1987-08-11
James, Andrew J.
357 51, 357 55, H01L 2978, H01L 2906
Patent
active
046865527
ABSTRACT:
A two-device trench cell having a transistor surrounded by a capacitor. This combined capacitor and transistor cell can be used as a memory cell. The capacitor is first fabricated into the walls of a trench leaving a narrowed trench into which a vertical metal-oxide-semiconductor field-effect-transistor (MOSFET) may be fabricated. One of the plates of the capacitor doubles as a source/drain layer of the transistor.
REFERENCES:
patent: 4462040 (1984-07-01), Ito et al.
patent: 4467450 (1984-08-01), Kuo
patent: 4577395 (1986-03-01), Shibata
Nguyen Bich-Yen
Parrillo Louis C.
Teng Ker-Wen
Fisher John A.
Jackson Jerome
James Andrew J.
Mossman David L.
Motorola Inc.
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