Integrated circuit timer system having a global bus for transfer

Details Integrated circuit timer system having a global bus for transfer Integrated circuit timer system having a global bus for transfer

1995-11-13

1998-03-24

Harvey, Jack B.

395557, 395553, 395280, 395308, 395311, G06F 104, G06F 1300

Patent

active

057322252

ABSTRACT:
The present invention relates in general to an integrated circuit timer system, and more particularly to an integrated circuit timer system having at least one global communication bus conductor for transferring information between local buses. Referring to FIGS. 1 and 10, a global channel communication bus (200) is used to communicate information between channels (204-206) which are coupled to different pin/status buses (216-218). The purpose of the global channel communication bus (200) is to synchronously transfer information between channels in different I/O control modules (IOCMs 25-29), and to synchronously transfer information between channels (e.g. 204-206) within an IOCM (e.g. 27) that are coupled to different pin/status buses (e.g. 216 and 217). In addition, in some embodiments, the global channel communication bus (200) can provide and receive information from external to input/output integrated circuit (22) by way of integrated circuit pins (223). Thus interrupts and a service processor are not required to communicate locally generated status or control information to other independent functional blocks of circuitry.

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