Integrated circuit test structure

Electricity: measuring and testing – Measuring – testing – or sensing electricity – per se – With rotor

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Details

29574, 324 51, 324158T, G01R 3126, H01L 702

Patent

active

041444930

ABSTRACT:
A complex test structure for integrated, semiconductor circuits in which the impurity regions of the test device are elongated, preferably in serpentine fashion. The elongated impurity regions emulate corresponding regions in regular integrated circuit devices. Additional regions are provided, each in elongated form, which, when impressed with appropriate voltages or currents, provide indications of defect levels and product yield in the regular devices. Advantageously, the serpentine test structure is fabricated on the same wafer and with the same process steps as the regular integrated circuit chips. In one embodiment, a plurality of such monitors are provided adjacent each other in the same test site. Regions in one monitor are selectively connected to regions in another monitor and to external contact pads by contact stations disposed between each monitor.

REFERENCES:
patent: 3507036 (1970-04-01), Antipov et al.
patent: 3851245 (1974-11-01), Baker et al.
patent: 3974443 (1976-08-01), Thomas
patent: 3983479 (1976-09-01), Lee et al.
Ghatalia et al; "Semiconductor Process Defect Monitor"; IBM Tech. Dis. Bull.; vol. 17; No. 9; Feb. 1975; pp. 2577-2578.

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