Photocopying – Projection printing and copying cameras – Focus or magnification control
Reexamination Certificate
2000-09-28
2003-04-01
Adams, Russell (Department: 2851)
Photocopying
Projection printing and copying cameras
Focus or magnification control
C355S053000, C355S067000, C355S077000, C430S005000, C430S022000, C430S030000, C430S311000, C430S312000
Reexamination Certificate
active
06542221
ABSTRACT:
STATEMENT REGARDING FEDERALLY SPONSORED RESEARCH OR DEVELOPMENT
Not Applicable.
BACKGROUND OF THE INVENTION
The present embodiments relate to fabricating semiconductor integrated circuits, and are more particularly directed to automatically determining the best focus for a wafer stepper for thereafter forming integrated circuits on semiconductor substrates.
Integrated circuits are immensely prevalent in all aspects of contemporary electronic technology. Indeed, vast resources are expended in developing and implementing integrated circuit technology in order to supply demands imposed by the consuming marketplace. In this regard, the efficient production of integrated circuits is critical, and the present embodiments are directed at such efficiency. Particularly, the present embodiments improve the efficiency for focusing a wafer stepper used to build integrated circuits on a semiconductor wafer or the like and, therefore, improve the entire process of integrated circuit formation. This as well as other benefits are explored later, but are first preceded by a discussion of the prior art.
By way of introduction,
FIG. 1
illustrates a general view of various components of a patterning system
10
, where system
10
is generally available in the prior art, but also may be improved using the best focus determination of the preferred embodiments discussed later. Before proceeding, note that system
10
is shown in a simplified format in that only various components are illustrated, or consolidated, in order to simplify the present discussion and to facilitate a greater understanding of the background of the preferred embodiments discussed later; thus, one skilled in the art will appreciate that system
10
may include various items in addition to, or in lieu of, those shown in FIG.
1
. Turning then to the details of
FIG. 1
, system
10
includes a light source
12
disposed over a plate
14
, where plate
14
is typically quartz and is or has been referred to in the art by various names such as a “reticle” or a “mask.” For sake of convenience, therefore, plate
14
is hereafter referred to as reticle
14
. Located below reticle
14
is a projection lens
16
, which actually may include more than one lens and may cooperate with one or more mirrors (not shown). Looking to the bottom of
FIG. 1
, system
10
further includes a wafer support
18
, which supports at least one wafer
20
so that its surface
20
s
is facing projection lens
16
. A photoresist layer
22
may be placed on surface
20
s.
Lastly, system
10
includes a controller
29
which may include electronic control circuitry and apparatus, including computer control such as through a processor or the like, so that various control actions may be taken with respect to other items in system
10
; by way of example, therefore, control arrows are shown from controller
29
to light source
12
, reticle
14
, projection lens
16
, and wafer support
18
.
A brief description of the operation of system
10
is now provided. Light source
12
is energized, such as by way of a control operation from controller
29
, and in response it provides a light beam
24
to reticle
14
. Although not expressly shown in
FIG. 1
, it is known in the art that portions of reticle
14
block the passage of light while other portions of reticle
14
allow light to pass through it, thereby providing a light image
26
toward projection lens
16
. Projection lens
16
then focuses and projects light image
26
so that a projected image
28
is directed toward a particular location on photoresist layer
22
and corresponding to an underlying location of surface
20
s
of wafer
20
. A particular location is sometimes referred to in the art as an exposure or field. Once projected image
28
impinges on surface
20
s,
and in combination with the effect of photoresist
22
, a circuit image is formed, and it should be noted that this image may form directly on surface
20
s
or in some other layer that has been located on surface
20
s
(e.g., polysilicon, silicon dioxide, silicon nitride, glass, polyamide, metals or metal alloys). In any event, the circuit image includes either a circuit element or some other photographically imparted device features in surface
20
s
or a layer above that surface. Lastly, it is noted that this image is also sometimes referred to in the art as a pattern.
After the steps described above, wafer support
18
moves and thereby moves wafer
20
, such as by way of a control operation from controller
29
. Next, the steps described above are repeated, so once more light beam
24
passes through reticle
14
to produce a light image
26
, and light image
26
passes through projection lens
16
to create a projected image
28
which impinges on a different location of photoresist layer
22
corresponding to a different underlying location on wafer
20
. This repeated sequence is itself repeated numerous times so that numerous images (or patterns) are formed on a single wafer. Each image may be a portion of a single circuit or may represent multiple duplicate circuits on the wafer. Thus, system
10
essentially “steps” from one image to the next and, hence, is often referred to in the art as a “stepper.”
Having now described system
10
in structure and its operation, attention is turned to issues of image beam focus, as that concept is particularly relevant to the preferred embodiments described later. In particular, since system
10
comprises photolithographic aspects, then the vertical displacement lens
16
and wafer
20
defines the extent to which projected image
28
is properly focused on wafer
20
(or photoresist
22
). As with most photolithographic processes, the better the focus, the better the resultant product. Thus, controller
29
further includes some type of focus control apparatus for adjusting the focus of projected image
28
with respect to wafer
20
, such as by vertically moving projection lens
16
relative to wafer
20
. As a basis for the amount of movement required, typically a sample wafer is first selected form a batch (or “lot”) of wafers, and the sample wafer is used to determine an appropriate focus distance referred to as a “best focus,” where examples of this determination are detailed below. This best focus distance is then used for the remaining wafers in the batch as each of those wafers is patterned using system
10
. More particularly, for each of those wafers, the earlier-determined best focus is used with respect to system
10
to adjust projection lens to relative to wafer
20
. Indeed, most commonly a focus correction is made prior to each exposure in an effort to obtain an optimal focus for the ensuing exposure.
A first prior art method for determining a best focus is now introduced, and explained in greater detail below in connection with the graph of
FIG. 2
a.
In this method, a sample wafer is placed either in a given stepper system or a comparable system that is assumed to have a same focusing distance as the given stepper system, where the comparable system will be used to pattern other wafers from the same batch as the sample wafer. Next, a number of lines are patterned on the sample wafer, where different lines are patterned using different focus distances. A first distance is considered a baseline value which is established at what is anticipated as the best focus distance but, as detailed below, the result of the method may indicate that some offset distance should be added or subtracted from the baseline value to achieve the best focus for either the given system in which the sample wafer is patterned or in another system which is expected to be sufficiently comparable to the given system.
Turning to
FIG. 2
a,
it illustrates measurements that are made of the critical dimension (“CD”) for the patterned lines formed on a sample wafer, where typically the CD is the width of the line and corresponding to the smallest width which will be required to form a part of a circuit element (e.g., a width of the gate of a transistor). The horizontal axis in
FIG. 2
a
illustra
Tang Zhicheng
Terry Roger M.
Adams Russell
Brown Khaled
Tung Yingshang
LandOfFree
Integrated circuit system with automated best focus... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Integrated circuit system with automated best focus..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Integrated circuit system with automated best focus... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3107119