Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor
Reexamination Certificate
2007-03-30
2010-02-09
Brewster, William M (Department: 2823)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
C438S118000, C438S460000, C438S463000, C257S110000, C257S460000, C257SE21499
Reexamination Certificate
active
07659140
ABSTRACT:
An integrated circuit system including: providing an integrated circuit wafer having an integrated circuit side and a backside; mounting a protective adhesive on the integrated circuit side of the integrated circuit wafer; removing material from the backside of the integrated circuit wafer; and dicing the integrated circuit wafer through the protective adhesive to form an integrated circuit die.
REFERENCES:
patent: 7452787 (2008-11-01), Miyazaki et al.
patent: 2003/0131929 (2003-07-01), Yamamoto
patent: 2004/0142284 (2004-07-01), Sakaguchi et al.
patent: 2005/0199592 (2005-09-01), Iri et al.
patent: 2006/0094208 (2006-05-01), Park et al.
patent: 2007/0054115 (2007-03-01), Codding et al.
Lee Sang-Ho
Lee Tae-woo
Yoon BoHan
Baptiste Wilner Jean
Brewster William M
Ishimaru Mikio
Stats Chippac Ltd.
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