Integrated circuit synchronous delay line

Details Integrated circuit synchronous delay line Integrated circuit synchronous delay line

1982-12-06

1985-01-29

Miller, Stanley D.

Electrical transmission or interconnection systems

With nonswitching means responsive to external nonelectrical...

Temperature responsive

307603, 307605, 307471, H03K 513, H03K 5159

Patent

active

044968612

ABSTRACT:
A synchronized delay line is described which is tapped to provide a plurality of timing signals. The delay line is insensitive to voltage changes, temperature changes and wafer processing variations. It is ideally suited for providing on-chip timing signals derived from a reference clock for MOS integrated circuits.

REFERENCES:
patent: 3599011 (1971-08-01), Zwolle
patent: 3634772 (1972-01-01), Katz
patent: 4023110 (1977-05-01), Oliver

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