Active solid-state devices (e.g. – transistors – solid-state diode – Heterojunction device
Reexamination Certificate
2001-01-29
2002-08-06
Nelms, David (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Heterojunction device
C257S184000, C257S185000, C438S309000
Reexamination Certificate
active
06429466
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to the fabrication of semiconductors based on GaN and similar materials, and more particularly, to a method for relieving the stress generated when layers of such materials are grown on a substrate having lattice constants that differ from those of the grown layer.
BACKGROUND OF THE INVENTION
Group III-V materials such as the GaN material system are particularly useful in constructing lasers and LEDs in the blue and green wavelengths. The construction of an optical device based on these materials typically begins with the deposition of a layer III-V material on a substrate such as sapphire or Si. Ideally, one would like to grow an optical device such as a laser on silicon so that additional circuit components can be fabricated on the same die. Because of the lattice mismatch, such growth is not currently practical. Accordingly, lasers are often grown on sapphire. However, there is still a significant mismatch in the lattice constants of sapphire and GaN. For example, the lattice constant for GaN differs from that of sapphire by approximately 13-16%. During the growth of the GaN layer, the substrate and the GaN layer tend to keep their original lattice parameters; hence, there is a mismatch between the lattice parameters between the two layers. This mismatch generates stress in the GaN layer which, in turn, leads to defects in the layer. Such defects interfere with the construction of further layers on the base layer and reduce the yield of useful devices.
Broadly, it is the object of the present invention to provide an improved method for growing Group III-V layers on a substrate having a substantially different lattice constant.
It is a further object of the present invention to provide a method for growing GaN on Si in which the stress generated by the lattice mismatch is substantially reduced.
These and other objects of the present invention will become apparent to those skilled in the art from the following detailed description of the invention and the accompanying drawings.
SUMMARY OF THE INVENTION
The present invention is a method for growing a crystalline layer that includes a first material on a growth surface of a crystalline substrate of a second material, wherein the first material and second material have different lattice constants. A buried layer is generated in the substrate such that the buried layer isolates a layer of the substrate that includes the growth surface from the remainder of the substrate. The second material is then deposited on the growth surface at a growth temperature. The isolated layer of the substrate has a thickness that is less than the thickness at which defects are caused in the crystalline lattice of the first by the second material crystallizing thereon. The buried layer is sufficiently malleable at the growth temperature to allow the deformation of the lattice of the isolated layer without deforming the remainder of the substrate. The present invention may be utilized for growing III-V semiconducting material layers on silicon substrates. In the case of silicon-based substrates, the buried layer is preferably SiO
2
doped with impurities, which is sufficiently malleable at the growth temperature to allow the deformation of the isolated substrate layer.
REFERENCES:
patent: 5436175 (1995-07-01), Nakato et al.
patent: 5589407 (1996-12-01), Meyyappan et al.
patent: 6120597 (2000-09-01), Levy et al.
patent: 6171920 (2001-01-01), El-Sharawy et al.
Chen Yong
Corzine Scott W.
Kamins Theodore I.
Ludowise Michael J.
Mertz Pierre H.
Agilent Technologie,s Inc.
Le Dung
Nelms David
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