Patent
1989-01-31
1991-11-19
Hille, Rolf
357234, 357 44, 357 45, 357 46, 357 34, H01L 2904, H01L 2910, H01L 2702, H01L 2972
Patent
active
050670026
ABSTRACT:
A process is disclosed for fabricating improved integrated circuit devices. In accordance with one embodiment of the invention integrated devices are fabricated by a process which produces small device areas without relying upon restrictive photolithography tolerances. The process uses four polycrystalline silicon layers to fabricate and contact the device regions, to achieve a relatively planar structure, and to reduce the size of device regions below normal photolithographic tolerances. The process uses a master mask to define the basic footprint of the device in combination with easy to align block-out masks in each lithography step. Means and methods for many types of devices such as complementary lateral and vertical bipolar transistors, JFETs, Sits, MOSFETs, resistors, diodes, capacitors and other devices which can be simultaneously fabricated are also described.
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Balda Raymond J.
Hwang Bor-Yuan
Wagner Allen J.
Zdebel Peter J.
Fahmy Wael
Handy Robert M.
Hille Rolf
Motorola Inc.
Parsons Eugene A.
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