Integrated-circuit structures and methods for correction of...

Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion

Reexamination Certificate

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C341S155000, C341S120000, C341S132000, C341S127000, C341S118000, C341S119000, C341S143000, C341S121000, C341S159000, C341S158000, C341S156000, C340S398100, C307S328000, C307S328000, C307S328000, C307S402000

Reexamination Certificate

active

06246353

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to temperature and process-induced integrated-circuit parameter errors and more particularly, to structures and methods for correcting such errors.
2. Description of the Related Art
Because they are created by the same diffusion processes, active components of integrated circuits are inherently well matched. In an active-component example, equal values of V
BE
in different bipolar transistors generate substantially equal base and emitter currents and absolute V
BE
values substantially track over temperature. Similarly, passive-component values (e.g., resistances) substantially track over temperature.
Absolute parameter values, however, vary over temperature within one integrated circuit and vary from lot-to-lot because of process-induced changes. Various conventional integrated-circuit design techniques (e.g., current mirroring and feedback) can generally correct the signal errors that would otherwise result from these changes. For example, feedback is typically used to cause amplifier gains to be defined as resistor ratios because such ratios substantially cancel temperature and process-induced changes.
Nonetheless, there are change-induced signal errors whose correction is not amenable to conventional integrated-circuit design techniques. An exemplary case is found in the pipelined stages of a subranging analog-to-digital converter (ADC).
In these converters, an initial ADC stage responds to the output of an initial sampler by quantizing the analog input signal to an initial number of digital bits. A digital-to-analog converter (DAC) responds to the initial ADC stage and its analog output is subtracted from the sampler's output to obtain an analog residue signal which is then pipelined to a subsequent ADC stage that quantizes it to a subsequent number of digital bits.
To enhance operation of the subsequent ADC stage, the residue signal is typically “gained up” by a precision amplifier and then sampled by a subsequent sampler. Subranging ADC degradation (e.g., nonlinearities, missing codes) will be observed if the processed residue signal does not match the input range of the subsequent stage.
Closed-loop feedback techniques are typically used to substantially eliminate gain errors in the precision amplifier but, principally because of speed considerations, these techniques are generally not available to the subsequent sampler. Accordingly, it forms a source of unresolved pipeline gain error which can cause subranging ADC degradation.
SUMMARY OF THE INVENTION
The present invention is directed to integrated-circuit structures and methods for correcting temperature and process-induced parameter errors. This goal is achieved with a method of generating an error signal that represents temperature and process-induced changes in integrated-circuit transistor output impedance.
In a method embodiment of the invention, a reference transistor and a sense transistor are biased to each generate a substantially temperature-insensitive minority-carrier current. The reference transistor is provided with a substantially constant voltage across its current terminals to convert its minority-carrier current into a substantially temperature-insensitive reference current I
R
.
In contrast, the sense transistor is provided with a temperature-varying voltage across its current terminals to convert its minority-carrier current into a temperature-varying sense current I
S
. The reference current and the sense current are then differenced to realize an error signal I
E
. Preferably, the voltage across the sense transistor's current terminals is varied substantially linearly with temperature.
Because the reference transistor and the sense transistor are formed in the same integrated-circuit production lot, the reference transistor's current I
R
subtracts out the absolute collector component of the sense transistor's current I
S
so that the error signal I
E
represents only those changes generated over temperature due to the process-dependent Early voltage V
A
.
Many integrated-circuit systems (e.g., subranging analog-to-digital converters) contain circuits that generate temperature and process-induced signal errors but that cannot accommodate conventional signal-stabilizing circuitry because that circuitry would degrade circuit operation. The error signal I
E
is especially useful for correcting these signal errors because it contains information that describes temperature and process-induced signal changes in transistor parameters.
The teachings of the invention may be practiced with various transistor types (e.g., bipolar and complementary metal-oxide semiconductor (CMOS) transistors) in which current terminals respond to a control terminal. For bipolar transistors, the voltage across the transistor's current terminals is typically referred to as the collector-emitter voltage V
CE
.
The novel features of the invention are set forth with particularity in the appended claims. The invention will be best understood from the following description when read in conjunction with the accompanying drawings.


REFERENCES:
patent: 4158804 (1979-06-01), Butler et al.
patent: 5313207 (1994-05-01), Kouno et al.
patent: 5319370 (1994-06-01), Signore et al.
patent: 5384569 (1995-01-01), Komatsu
patent: 5440305 (1995-08-01), Signore et al.
patent: 5497155 (1996-03-01), Izuhara
patent: 5530444 (1996-06-01), Tice et al.
patent: 5550492 (1996-08-01), Murden et al.
patent: 5684419 (1997-11-01), Murden et al.
Kester, Walt, et al.,High Speed Design Techniques, Analog Devices, Inc., Norwood, MA., 1996, pp. 4-36 to 4-47.

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