Integrated circuit structure with interconnect formed along wall

Details Integrated circuit structure with interconnect formed along wall Integrated circuit structure with interconnect formed along wall

1995-12-15

1998-05-05

Jackson, Jerome

Active solid-state devices (e.g., transistors, solid-state diode

Integrated circuit structure with electrically isolated...

Including dielectric isolation means

257776, 438280, H01L 2900

Patent

active

057478678

ABSTRACT:
Insulating trenches (2) in the silicon layer of an SOI substrate that extend onto the insulating layer of the SOI substrate define silicon islands (3). At least one of the silicon islands (3) is an interconnect segment (3a) by a diffusion zone that is arranged at the walls of the surrounding trench (2) and that is formed by drive-out from an occupation layer introduced into the trench. The interconnect segment (3a) is suitable as an underpass for crossing interconnects (6a,6b) or as an additional metallization level.

REFERENCES:
patent: 5283461 (1994-02-01), Beasom
IEEE Transactions on Electron Devices, vol. 38, No. 7, New York, Jul. (1991), "Breakdown Voltage Enhancement for Devices on Thin Silicon Layer/Silicon Dioxide Film" Akio Nakagawa et al, pp. 1650-1654.
Halbleiterelektronik Band 13, Springer Verlag, 1980, "Integrierte Bipolarschaltungen", H.M. Rein et al, pp. 62-66.
B.G. Teubner Stuttgart, 1991, "Halbleiter-Technologie", Heinz Beneking, pp. 368-371.

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