Coded data generation or conversion – Digital code to digital code converters – Serial to parallel
Reexamination Certificate
2007-07-17
2007-07-17
Nguyen, Khai M. (Department: 2819)
Coded data generation or conversion
Digital code to digital code converters
Serial to parallel
C341S101000, C326S046000, C326S093000, C327S258000, C327S295000, C327S296000, C327S297000
Reexamination Certificate
active
11370727
ABSTRACT:
Integrated circuit serializer circuitry is provided that converts parallel data to serial data on an integrated circuit. A two-phase global serializer master clock generator uses a four-phase internal clock to generate a two-phase global serializer master clock. The two-phase global serializer master clock is distributed globally on the integrated circuit using a distribution path. The integrated circuit has multiple serial communications channels each of which has an associated serializer. Each serializer contains circuitry that derives a number of clock signals from the two phases of the global serializer master clock. Each serializer uses the derived clocks in converting parallel data to serial data for transmission over its associated serial communications channel. The serializers each contain two smaller serializers that convert first and second sets of parallel data to first and second serial outputs. A 2:1 serializer in each serializer merges the first and second serial outputs.
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Nguyen Toan Thanh
Shumarayev Sergey
Tran Thungoc M.
Altera Corporation
Nguyen Khai M.
Treyz G. Victor
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