Integrated circuit semiconductor device having improved wiring s

Details Integrated circuit semiconductor device having improved wiring s Integrated circuit semiconductor device having improved wiring s

1989-08-29

1991-06-25

Wimer, Michael C.

357 2314, 357 41, 357 45, H01L 29680, H01L 29780, H01L 27020, H01L 27100

Patent

active

050271750

ABSTRACT:
An integrated circuit semiconductor device having an improved wiring structure is disclosed. An insulating film and a semiconductor layer are formed in sequence on an upper surface of a semiconductor body, and first and second wiring layers are formed in the semiconductor body and in the semiconductor layer, respectively. A plurality of circuit elements are formed in the semiconductor layer on the insulating film, and each of the elements is connected to the first and second wiring layers. When the elements are memory cells, the first wiring layers may be used as bit lines.

REFERENCES:
patent: 4667217 (1987-05-01), Janning
patent: 4807017 (1989-02-01), Ema et al.
patent: 4892840 (1990-01-01), Esquivel et al.
Esquivel et al., High Density Contactless Self Aligned EPROM Cell Array Technology, IEDM 86, pp. 592-595.

Affiliated with

Also associated with

Rating

Integrated circuit semiconductor device having improved wiring s does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Integrated circuit semiconductor device having improved wiring s, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Integrated circuit semiconductor device having improved wiring s will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1043957