Integrated-circuit sampled-and-hold phase detector with integrat

Details Integrated-circuit sampled-and-hold phase detector with integrat Integrated-circuit sampled-and-hold phase detector with integrat

1992-08-03

1994-07-19

Wolfe, Willis R.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307353, 328133, 328155, H03K 526

Patent

active

053312309

ABSTRACT:
A sample-and-hold phase detector comprises a first charge/discharge circuit for charging a first storage capacitor with a constant current for a duration corresponding to a phase difference between an input pulse and a reference pulse and discharging it after it is sampled. A first sample-and-hold circuit samples the voltage developed in the first storage capacitor to represent the phase difference between the input pulse and the reference pulse. A second charge/discharge circuit periodically charges a second storage capacitor with a constant current for a fixed time interval and discharging it after it is sampled. A second sample-and-hold circuit samples the voltage developed in the second storage capacitor. A current setting circuit, in which a current setting resistor is provided, is connected to both charge/discharge circuits to determine their constant charging currents. A differential integrator provides differential integration on the voltage from the second sample-and-hold circuit with respect to a reference voltage to control the current setting circuit in a feedback loop.

REFERENCES:
patent: 4866368 (1989-09-01), Bird
patent: 5034633 (1991-07-01), Stekelenburg
patent: 5103123 (1992-04-01), McGinn
patent: 5157341 (1992-10-01), Fobbester et al.
patent: 5179301 (1993-01-01), Hughes
patent: 5227676 (1993-07-01), Bahr et al.

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