Integrated circuit PSK modem phase locked loop

Details Integrated circuit PSK modem phase locked loop Integrated circuit PSK modem phase locked loop

1982-08-16

1985-08-27

Ng, Jin F.

Pulse or digital communications

Repeaters

Testing

375 52, 375 81, 375 83, 375120, 329110, 331 17, H03D 300, H03B 306

Patent

active

045382824

ABSTRACT:
A PSK modem has a transmitter for converting input digital data into corresponding PSK signals modulated on a first carrier for transmission out and a receiver for receiving PSK signals and for converting those PSK signals into corresponding digital signals wherein the receiver has a phase locked loop used in demodulating the input PSK signal. The phase locked loop includes a low pass filter and an integrator connected in a circuit configuration so that the low pass filter output overrides the integrator output even if the output of the integrator is equal in magnitude to either of its input signals, thereby allowing the loop to lock. The integrator then adjusts itself slowly to reduce the DC output of the low pass filter and the steady state phase to 0. This permits the loop to free run in the absence of an input signal without losing lock.

REFERENCES:
patent: 3909735 (1975-09-01), Anderson et al.
patent: 4007429 (1977-02-01), Cadalora et al.
patent: 4243941 (1981-01-01), Zdunek
patent: 4330758 (1982-05-01), Swisher et al.
patent: 4336613 (1982-06-01), Hewes
patent: 4387348 (1983-06-01), Fritze

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