Integrated circuit provided with means for calibrating an...

Data processing: measuring – calibrating – or testing – Calibration or correction system – Circuit tuning

Reexamination Certificate

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Details

C702S106000

Reexamination Certificate

active

06691055

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention concerns an integrated circuit provided with means for calibrating at least one electronic module, a method for calibrating at least one electronic module of such integrated circuits in test phase, and a wafer of integrated circuits provided with calibrating means.
After having passed through the manufacturing steps, the integrated circuits on wafers or semiconductor substrates are tested together with the aid of a probe card test apparatus. Several batches of wafers are, for example, set on standby in the programmed apparatus before the wafers are gripped and each placed on a test support in order to receive the test probes on the corresponding pads of the integrated circuits to be tested. Usually, circuits on the wafer or the substrate are tested one after the other by means of a probe card placed on the contact pads of one of the circuits to be tested.
Currently, calibration is effected individually for each integrated circuit in order to obtain precise reference values by acting on internal or external electronic elements. In such case, the use of multiple probe cards for the simultaneous testing of several integrated circuits is thus not possible. This extends the testing time of the integrated circuits and causes an increase in additional costs in the manufacturing chain.
U.S. Pat. No. 5,648,661 discloses such an arrangement of metal paths in sawing strips to facilitate the testing of several integrated circuits on a same substrate or wafer without requiring the use of complicated probe cards, which allows a saving in the testing time. The metal paths disappear after the wafer is sawed to separate each integrated circuit. It is to be noted that no means for calibrating the electronic modules of integrated circuits are provided and that making the metal paths normally requires an additional step in the manufacturing of the integrated circuits, which is a drawback.
SUMMARY OF THE INVENTION
One object which the subject of the invention proposes to resolve includes an integrated circuit provided with means for calibrating at least one reference electronic module so that the output signal of the module is calibrated precisely to overcome the drawbacks described above.
Another object which the subject of the invention proposes to resolve includes a method for calibrating in test phase at least one electronic module of integrated circuits so that the output signal of the module is calibrated precisely in order to overcome the drawbacks described above.
These objects, in addition to others are achieved as a result of the integrated circuit provided with means for calibrating at least one electronic module, which is characterised in that the calibrating means are provided to calibrate in an autonomous manner at least one integrated reference electronic module as a function of an external reference signal introduced into the circuit by an input pad of the circuit and to store the final calibrating parameters when the output signal of the reference module is equal to the external reference signal.
These objects, in addition to others are also achieved as a result of the method for calibrating in test phase at least one integrated reference electronic module of at least one integrated circuit, which is characterised in that it includes the steps of:
a) powering the integrated circuit via an external electric power source;
b) applying on one of the input pads of the integrated circuit an eternal reference signal in conjunction with calibrating means of the integrated circuit so that they calibrate autonomously by iterating the reference electronic module using calibrating parameters until the reference output signal of the reference module is equal to the external reference signal; and
c) storing the final calibrating parameters provided by the calibrating means and a signature associated with the parameters in memory means.
These objects, in addition to others, are also achieved as a result of a wafer of integrated circuits which is characterised in that the integrated circuits are arranged on the wafer as a function of the location of their signal input and output pads in order to allow the probes of a probe card of a test machine to be placed on the pads of a group of integrated circuits to test and calibrate all the circuits of the group at the same time.
One advantage of the integrated circuit is that it is capable of calibrating in an autonomous manner; an internal reference signal of an integrated reference module, such as a reference voltage; and a time base or a reference frequency, on the basis of an external reference signal which is imposed and desired. As soon as the calibration phase is completed, a specific calibration word, forming the final calibrating parameters, is stored in an internal memory, for example an EEPROM memory, as well as the associated signature.
This final calibration storing prevents it being necessary, each time that voltage is subsequently applied to the circuit, to undertake a new calibrating operation, and prevents another external reference signal allowing another undesired calibration of the reference modules. For this purpose, as soon as voltage is applied to the integrated circuit, a check is thus made to see whether there is a signature stored in the memory, if so, no calibration method is started, since the calibration word of the memory is directly applied to the reference module.
For the sake of safety, it may be envisaged to have no signal input or output pad on the circuit directly connecting the output of the reference electronic module or modules in order to avoid anyone being able to have easy access to these parts of the circuit. The only accessible input pad for acting on the reference modules remains that which is used for calibrating the corresponding module. This calibrating pad should normally not allow the reference module to be acted on once the calibrating operation has finished.
Another advantage consists in that groups of integrated circuits of a same wafer can be calibrated in succession in an autonomous manner using an external reference signal applied at the same time to a group of circuits in test phase. Of course, other tests on the circuits can be undertaken in addition to the steps for calibrating the reference modules in a grouped or individual manner. In order to do this, a probe card placed on a group of neighbouring integrated circuits allows each circuit of the group to be supplied with electric voltage and, in a single operation, the reference signal to be brought at the corresponding input pad of each circuit so that it can be calibrated autonomously.
Since several circuits are calibrated at the same time and not successively, this allows the testing and calibrating time of the reference electronic modules to be reduced, as well as the costs in the manufacturing chain without it being necessary to provide the test apparatus with a specific complicated structure.
In a single operation, all the integrated circuits connected to a same external reference signal are calibrated quickly and autonomously of iterations by introducing into their EEPROM memory the calibrating word with the corresponding signature at the end of calibration of the reference module. This way of calibrating integrated reference modules of the circuit during testing can easily be repeated on another group of integrated circuits.


REFERENCES:
patent: 5070297 (1991-12-01), Kwon et al.
patent: 5319370 (1994-06-01), Signore et al.
patent: 5382922 (1995-01-01), Gersbach et al.
patent: 5790469 (1998-08-01), Wong
patent: 5909474 (1999-06-01), Yoshizawa
patent: 6064947 (2000-05-01), Sun et al.
patent: 6091281 (2000-07-01), Yoshida
patent: 6151238 (2000-11-01), Smit et al.
patent: 6157198 (2000-12-01), Mauerman

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