Integrated circuit process monitoring and metrology system

Details Integrated circuit process monitoring and metrology system Integrated circuit process monitoring and metrology system

2006-10-03

2006-10-03

Picardat, Kevin M. (Department: 2822)

Semiconductor device manufacturing: process

With measuring or testing

C438S007000, C438S010000, C438S015000

Reexamination Certificate

active

07115425

ABSTRACT:
A method for monitoring polishing process parameters for an integrated circuit structure on a substrate. A first metrology site is constructed on the substrate. The first metrology site represents a design extreme of a high density integrated circuit structure. The first metrology site is formed by placing a relatively small horizontal surface area trench within a relatively large surface area field of a polish stop material. A second metrology site is also constructed on the substrate. The second metrology site represents a design extreme of a low density integrated circuit structure. The second metrology site is formed by placing a relatively large horizontal surface area trench within a relatively small surface area field of a polish stop material. The substrate is covered with a layer of an insulating material, thereby at least filling the trenches. A target thickness of the insulating material necessary to leave the trenches substantially filled to a top surface of the field of polish stop material is calculated. The substrate is polished until a first thickness of the insulating material in the trench of the first metrology site is no more than the target thickness. A second thickness of the insulating material in the trench of the second metrology site is measured, and values based on the first thickness and the second thickness are monitored as the polishing process parameters for the integrated circuit structure.

REFERENCES:
patent: 5981354 (1999-11-01), Spikes et al.
patent: 6057068 (2000-05-01), Raeder et al.
patent: 6454899 (2002-09-01), Campbell et al.

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