Integrated circuit phase locked loop timing apparatus

Oscillators – Automatic frequency stabilization using a phase or frequency... – Afc with logic elements

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331 8, 331 17, 331 25, 331 34, 331111, 331113R, H03L 708, H03L 718

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active

046895817

DESCRIPTION:

BRIEF SUMMARY
The present invention relates to a timing apparatus for generating timing pulses.
For example, the timing pulses generated may be used for a microcomputer of the type described in our co-pending UK patent application No. 8233733 filed Nov. 26, 1982 or of the type described in our co-pending European patent application No. 83307078.2 filed Nov. 18, 1983.
The MOS technology processes used to manufacture microprocessors result in devices which are similar, but of varying performance. It is normal practice to measure the maximum operating speed of such devices after they have been manufactured, and it is found that the operating speed of the devices differ. The fast devices should be used with high frequency clock signals such that full advantage is taken of their potential to operate at high speeds, but the slower devices require a low frequency clock input. Thus, if the clock signals are to be matched to the operating speed of the manufactured devices it is currently necessary to provide an external clock of suitable speed once the performance of the microprocessor has been determined.
Furthermore, it is difficult to generate and distribute high frequency clock signals, and presently this imposes a real and practical limitation to the operating speed of current microprocessors and microcomputers.
Phase locked loops have been used for many years to construct frequency multipliers, and in recent times integrated circuit phase locked loops have been provided. However, the components of a phase locked loop are not easy to manufacture be existing integrated circuit manufacturing techniques such that existing integrated circuit phase locked loops require additional components external to the integrated circuit.
According to the present invention there is provided a timing apparatus including a control loop circuit and arranged upon receipt of a clock signal to produce a timing signal whose frequency is a multiple of that of said clock signal, said timing apparatus being formed on a single chip.
The present invention also extends to an integrated circuit timing apparatus comprising a phase locked loop arranged to produce an output timing signal whose frequency is a multiple of that of an input clock signal, wherein said phase locked loop comprises a voltage controlled oscillator and means for generating a voltage signal for controlling said oscillator, said generating means comprising one or more current sources.
According to a further aspect of the invention there is provided an integrated circuit device comprising a logic device connected to input and output pins, and a timing apparatus as defined above, an input of the timing apparatus being connected to one of the input pins for receipt of the clock signal, and an output of said timing apparatus being connected to said logic device to supply timing signals thereto.
Preferably, said logic device is a microcomputer.
The present invention also extends to a method of supplying timing signals to an integrated circuit logic device comprising applying a low frequency clock signal to an input of said integrated circuit, including in said integrated circuit a timing apparatus for receiving said clock signal and producing a timing signal having a frequency which is a multiple of that of said clock signal, and applying said high frequency timing frequency to said logic device.
Preferably, the operating speed of said logic device is determined and the frequency of the timing signal is matched to said operating speed.
The present invention also provides timing apparatus arranged to produce clock pulses, which timing apparatus includes a loop circuit incorporating a voltage controlled oscillator, the output signal being a multiple of the frequency of the input signal, said voltage controlled oscillator being responsive to the operation of one or more current sources, the operation of the current sources being adjustable to modify the output frequency.
The aforesaid modification of the current sources may be achieved by laser fusing techniques.
The aforesaid current sources m

REFERENCES:
patent: 3930304 (1976-01-01), Keller et al.
patent: 4034309 (1977-07-01), Vaughn
patent: 4093873 (1978-06-01), Vannier et al.
patent: 4141209 (1979-02-01), Barnett et al.
patent: 4210875 (1980-07-01), Beasom
patent: 4494021 (1985-01-01), Bell et al.
patent: 4524333 (1985-06-01), Iwata et al.
Brooks et al, "High Capacity Electronics System for a Compact, Battery-Operated Computer," Hewlett-Packard Journal, vol. 34, No. 6, Jun. 1983, pp. 10-15.

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