Integrated circuit phase-locked loop charge pump

Details Integrated circuit phase-locked loop charge pump Integrated circuit phase-locked loop charge pump

2000-06-20

2001-09-18

Wells, Kenneth B. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

C375S376000

Reexamination Certificate

active

06292039

ABSTRACT:

This invention refers to CMOS technology analog integrated circuits and more in particular to a charge pump to be used in a phase-locked loop (PLL) constructed as an integrated item in this technology.
The charge pump is a loop used to cancel the PLL error signal in rated conditions. The pump is typically connected between the phase comparator (or phase and frequency comparator) and the PLL ring filter and essentially consists of a current generator receiving increase and decrease impulses from the comparator and causing a variation to filter capacitor proportional to any difference in duration of such impulses. Greater details on phase-locked loops are available in documents “Low-Jitter Process Independent DLL and PLL Based on Self-Biased Technique”, by J. G. Maneatis, IEEE Journal of Solid State Circuit, Volume 31, Number 11, November 1996, pages 1723 and following and “Fully Integrated CMOS Phase-Locked Loop with 15 to 240 MHz Locking Range and ±50 ps Jitter” by 1. Novof et al., ISCCC Digest Technical Papers, pages 112 and following, February 1995. Both documents also describe differential control structures for the PLL oscillator.
The charge pump is generally desired to start operating even for small loop input phase errors and its sensitivity is therefore an important requirement. Small phase errors correspond to a very small difference in duration between the two impulses supplied to the pump and therefore a very short duration ring filter control signal. In implementing the pump as an integrated circuit, due to the unavoidably far from ideal circuit component features, it was found that correction introduced in case of very short impulses cannot be forecast and is therefore difficult to control. Furthermore, if the PLL oscillator is controlled in the differential mode—a solution normally adopted to reduce jitter—the effects due to each of the control signals are summed together and increase correction indeterminateness.
A further problem is the fact that the filter contains a relatively small capacity capacitor, because of technological reasons dependent on integration processes. It follows that the resistance in the filter must in principle be relatively high for reasons of stability, which can cause system malfunctioning additional to the indeterminateness introduced by the too short duration of filter control signals.
This last problem was solved by providing resistor-less filters and supplying the loop oscillators with an additional control generated by a supplementary pump for instance, as described in the two documents mentioned above, particularly the one by Novof et al. This control signal would however be a short duration impulse signal, which disturbs oscillator operation.
According to this invention a charge pump is however supplied, which eliminates the need to supply very short impulses to the ring filter and oscillator.
According to the invention, the pump allocated to generating a current signal for controlling at least the ring filter in a phase-locked loop where a phase detector periodically gives such pump a first and second impulse whose emission instants depend on the loop input signal phase ratio and are allocated to control loop output magnitude increase or decrease respectively is characterized by the fact that it includes:
a logic network for recognizing the simultaneous presence of such first and second impulse and generating a third impulse representative of such simultaneous presence
a delay element receiving such third impulse and re-emitting it after a preset period of time longer than the minimum duration of such first and second impulse and shorter than the repetition period of such impulses
a first and second integrator circuit respectively actuated by the first and second impulse are deactivated by such third impulse and generate signals whose amplitude is tied to the emission instant of such first and second impulse and whose duration depends on such emission instant and the duration of the preset time interval
subtraction means connected to the output of the first and second integrator circuit and suitable to generate at least a first value and sign current signal representative of any difference in amplitude between the output signals of such two integrator circuits.
The invention also concerns a process for generating ring filter control current signals by using the pump according to the invention, characterized by the fact that it contains operations for:
recognizing the simultaneous presence of such first and second impulse and generating a third impulse representative of such simultaneous presence
delaying such third impulse for a preset period of time longer than the minimum duration of such first and second impulse and shorter than the period of such impulses
converting such first and second impulse into a respective first and second voltage signal whose amplitude is tied to the emission instant of such first and second impulse and whose duration depends on such emission instant and the duration of the preset time interval
obtaining from such first and second voltage signal at least a first current signal representative of their difference, for ring filter control.


REFERENCES:
patent: 5307028 (1994-04-01), Chen
patent: 5602794 (1997-02-01), Javanifard et al.

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