Integrated circuit/packet switching system

Details Integrated circuit/packet switching system Integrated circuit/packet switching system

1984-03-14

1986-02-04

Olms, Douglas W.

Multiplex communications

Wide area network

Packet switching

370 86, 370 94, H04Q 1104

Patent

active

045690413

ABSTRACT:
In an integrated circuit/packet switching network comprising a plurality of nodes and one or more common access loops for inter-node network, an integrated circuit/packet switching system comprises a fixed time cycle frame format allotted to the loop or loops. Each of the nodes functions in accordance with the frame format to assemble one or more composite packets for each destination node from a plurality of circuit- and packet-switched calls designated to said each destination node and to send the assembled composite packet or packets on the loop or loops for each frame cycle time. Each node also functions in accordance with the frame format to extract self-designated composite packets among composite packets on the loop or loops and to disassemble the extracted composite packets into the constituent circuit- and packet-switched calls.

REFERENCES:
patent: 4154983 (1979-05-01), Pedersen
patent: 4392222 (1983-07-01), Ando
patent: 4408323 (1983-10-01), Montgomery
patent: 4413337 (1983-11-01), Dauphin et al.
patent: 4446555 (1984-05-01), Devault et al.
patent: 4482999 (1984-11-01), Janson et al.
patent: 4491997 (1985-01-01), Frank
patent: 4494231 (1985-01-01), Slawy et al.

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