Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead
Reexamination Certificate
2003-05-12
2004-09-14
Clark, S. V. (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
With contact or lead
C257S698000
Reexamination Certificate
active
06791177
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of Invention
This invention relates to integrated circuit packaging and, more particularly, to a substrate of the integrated circuit package (hereinafter “package substrate”) that uses guard conductors that at least partially surround a conductor that is co-planar with the guard conductors, such that when the conductor receives noise sensitive signals those signals are protected against cross-talk from extraneous conductors.
2. Description of Related Art
The following descriptions and examples are not admitted to be prior art by virtue of their inclusion within this section.
Integrated circuits have evolved over the years. In part, the enhancement in semiconductor components (e.g., smaller and faster transistors) has contributed to the increased functionality and speed of integrated circuits. Modern integrated circuits have become denser in overall circuit components and employ smaller critical dimensions. Manufacturing of these modem integrated circuits has also advanced in order to maintain pace with the growing number of components involved for each integrated circuit. Fabrication processes have minimized feature sizes and thus, increased the number of die per wafer. The results provide an increase in the yield of the wafer, which lends itself to cost-efficient integrated circuits.
Following the manufacturing process, the integrated circuit may typically be secured within a protective semiconductor device package. There are various ways to secure an integrated circuit within a package. One way is to bond the integrated circuit to a leadframe and connect pads of the integrated circuits to leads of the leadframe. After packaging the integrated circuit so that leads extend from the finished package, the leads can be inserted into or surface mounted onto a printed circuit board using, for example, through-hole or surface mount techniques. Surface mount techniques include tape automated bonding.
Another way of packaging an integrated circuit is to simply flip the integrated circuit and bond the bonding pads to an array of receptors on a package substrate. In one example, a package substrate for a flip-chip application is a ball grid array (“BGA”) substrate. A BGA package substrate may be made of, for example, fiberglass-epoxy printed circuit board material or a ceramic material (e.g., aluminum oxide, alumina, Al
2
O
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, or aluminum nitride, AIN), and it may be a single layer or a multi-layer fabricated substrate. The package substrate may include a layer in which a patterned conductive material forms an electrical conductor (e.g., a power conductor plane, a ground conductor plane, etc.). In some instances, the package substrate may also include routing layers directing input and output signals through the substrate. To attach the integrated circuit, the topside of the integrated circuit is thus flipped over on top of the package substrate and typically secured using a solder reflow technique. The package substrate and the flipped integrated circuit can then be encapsulated to form the overall package. In order to route the signals between the integrated circuit and the package substrate, a plurality of vias are included to provide a connection path.
As integrated circuits become more dense and complex, there is a concern with preserving signal integrity of signals routed through the substrate and the overall noise of a package. Cross-talk can occur when mutual inductance and coupling capacitance occurs between two signals routed in close proximity to each other. Cross-talk noise can cause significant signal integrity problems in system applications.
While it is sometimes unavoidable to prevent undue cross-talk between conductors that extends across an integrated circuit substrate, it is conceivable that cross-talk can be substantially eliminated within a package substrate. An integrated circuit substrate is that across which conductors of an integrated circuit are formed. Distinguishable from an integrated circuit substrate is the package substrate. A package substrate may contain multiple layers of conductors, some of which may be dedicated to power, ground, or signal conductors, but all of which are contained within the package substrate. The integrated circuit substrate generally comprises silicon crystal silicon and resident on the substrate arc multiple layers that form a wafer. The wafer is diced into separate die that are then placed, in flip chip fashion, for example, onto the package substrate. The package substrate therefore provides an interface between the integrated circuit and the printed circuit board (PCB).
When an integrated circuit is to be bonded to a package substrate, the integrated circuit can be bonded in a flip-chip arrangement, with the integrated circuit inverted and coupled to the package substrate. The trace conductors extending across the surface of the integrated circuit are generally densely packed. Yet, when those conductors of an integrated circuit are coupled to conductors within multiple layers of the package substrate, conductors within the package substrate can undergo considerable “fanout.” This means that the conductors within the package substrate can be spaced further from each other than the more densely packed conductors on the integrated circuit substrate. There may be numerous mechanisms in which to isolate noise within conductors on an integrated circuit; however, a conventional technique used to isolate noise among conductors of a package substrate is to simply space the conductors further from each other using the conventional fanout technique. However, fanout will not be sufficient in all circumstances, and certainly will not be adequate if one or more signals are especially sensitive to noise. In most instances, the trace conductors in the package substrate are much longer than trace conductors in the integrated circuit. While fanout provides help in spreading out the rather long signal trace conductors, the added length needed to effectuate fanout (as well as the large input/output count and body size of the package substrate) can increase the cross-talk noise within the package.
It would be desirable to introduce a packaging substrate that can more effectively reduce noise cross-talk among signals of adjacent conductors. The desired package substrate should be one that uses a more elaborate isolation mechanism than simply spacing the conductors further apart, and thus unduly consuming valuable substrate area. While noise induced in two signals of closely spaced conductors upon a die, or integrated circuit, is problematic, remedies against inducing additional noise among conductors within a package substrate must be sought. The desired improvement is thereby one that is focused on noise reduction in the package substrate, and not necessarily that of the integrated circuit substrate.
SUMMARY OF THE INVENTION
The problems outlined above may be in large part addressed by a multi-layer package substrate that dedicates guard conductors to minimize noise from being coupled onto conductors containing noise-sensitive signals, hereinafter referred to as noise-sensitive conductors. The package substrate may include a plurality of layers, in which one layer, preferably a surface of the package substrate may contain a plurality of terminals. The terminals can be used to couple with the integrated circuit on one surface of the package substrate or with a PCB on the opposite surface of the package substrate. The terminals that couple to the integrated circuit are often referred to as solder bumps, and the terminals that couple to the PCB are often referred to as solder balls. The terminals therefore provide input/output signals that are sent between the integrated circuit (or circuits) placed on one surface of the package substrate and the PCB on the opposing surface. One terminal can receive a ground voltage supply (or power supply) that is then routed to the layer containing a ground conductor (or power supply conductor).
In addition to the co-planar terminals placed on opposing surface of the package s
Fulcher Edwin M.
Miller Leah M.
Thurairajaratnam Aritharan
Clark S. V.
Conley & Rose, P.C.
LSI Logic Corporation
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