Integrated circuit packaging system with rounded...

Details Integrated circuit packaging system with rounded... Integrated circuit packaging system with rounded...

2010-06-02

2011-10-18

Sefer, A. (Department: 2893)

Semiconductor device manufacturing: process

With measuring or testing

Packaging or treatment of packaged semiconductor

C257S737000

Reexamination Certificate

active

08039275

ABSTRACT:
A method of manufacture of an integrated circuit packaging system includes: forming a rounded interconnect on a package carrier having an integrated circuit attached thereto; placing a mold chase having a protrusion over the rounded interconnect; forming an encapsulation over the package carrier, the encapsulation having a recess under the protrusion; removing the mold chase to expose the encapsulation; and removing the encapsulation under the recess for exposing the rounded interconnect.

REFERENCES:
patent: 7345361 (2008-03-01), Mallik et al.
patent: 2007/0158806 (2007-07-01), Kwon et al.
patent: 2007/0190690 (2007-08-01), Chow et al.
patent: 2008/0230887 (2008-09-01), Sun et al.
patent: 2009/0236726 (2009-09-01), Retuta et al.
patent: 2010/0289134 (2010-11-01), Chow et al.
U.S. Appl. No. 12/560,312, filed Sep. 15, 2009, Jang et al.
U.S. Appl. No. 12/730,989, filed Mar. 24, 2010, Bae et al.

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