Integrated circuit packaging system with interposer and...

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package

Reexamination Certificate

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C438S393000, C257SE21597, C257SE23011

Reexamination Certificate

active

08004073

ABSTRACT:
A method of manufacture of an integrated circuit packaging system includes: attaching a lower integrated circuit, having a first through via, over a substrate with the first through via coupled to the substrate; mounting a pre-formed interposer, having an interposer through via and an integrated passive device, over the lower integrated circuit with the interposer through via coupled to the first through via; attaching an upper integrated circuit, having a second through via, over the pre-formed interposer; and forming an encapsulation over the upper integrated circuit and the pre-formed interposer.

REFERENCES:
patent: 5530288 (1996-06-01), Stone
patent: 6274937 (2001-08-01), Ahn et al.
patent: 7032392 (2006-04-01), Koeneman et al.
patent: 7151009 (2006-12-01), Kim et al.
patent: 7531905 (2009-05-01), Ishino et al.
patent: 2010/0244221 (2010-09-01), Ko et al.
patent: 2011/0074492 (2011-03-01), Tran et al.

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