Integrated circuit packaging system with exposed terminal...

Details Integrated circuit packaging system with exposed terminal... Integrated circuit packaging system with exposed terminal...

2011-04-05

2011-04-05

Clark, Jasmine J (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

With contact or lead

C257S666000, C257S673000, C257S685000, C257S686000, C257SE25006, C257SE25013, C257SE25021, C257SE25027, C257SE23085, C438S109000, C438S123000

Reexamination Certificate

active

07919850

ABSTRACT:
A method of manufacture of an integrated circuit packaging system includes: providing a lead; mounting an inner package so that the lead is peripheral to the inner package, and the inner package having a connection pad; forming an exposed terminal interconnect on the connection pad; and encapsulating the inner package, and partially encapsulating the exposed terminal interconnect with an encapsulation.

REFERENCES:
patent: 6791168 (2004-09-01), Connell et al.
patent: 6906416 (2005-06-01), Karnezos
patent: 7064426 (2006-06-01), Karnezos
patent: 7193309 (2007-03-01), Huang et al.
patent: 7435619 (2008-10-01), Shim et al.
patent: 7642633 (2010-01-01), Hirose et al.
patent: 7750451 (2010-07-01), Camacho et al.
patent: 2007/0114648 (2007-05-01), Karnezos
patent: 2007/0200205 (2007-08-01), Filoteo et al.
patent: 2008/0157325 (2008-07-01), Chow et al.

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