Integrated circuit packaging system with circuitry stacking...

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Metallic housing or support

Reexamination Certificate

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Details

C438S124000, C257S676000, C257S735000, C257S787000

Reexamination Certificate

active

07919360

ABSTRACT:
A method of manufacture of an integrated circuit packaging system includes: forming a lead to include a first tip at one end, a second tip on the end opposite from the first tip with a connect area between each end located above the first tip, and a first tier section or a second tier section located between the connect area and the second tip; connecting a bottom component assembly to the first tier section or the second tier section; connecting a top component assembly over the connect area; and applying an encapsulant over and under the connect area with the first tip exposed.

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patent: 2010/0025834 (2010-02-01), Camacho et al.

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