Integrated circuit packaging system having through silicon...

Details Integrated circuit packaging system having through silicon... Integrated circuit packaging system having through silicon...

2008-12-11

2010-12-28

Smith, Zandra (Department: 2822)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

With contact or lead

C438S107000, C438S108000, C438S109000, C438S125000

Reexamination Certificate

active

07859099

ABSTRACT:
A method of manufacture of an integrated circuit packaging system includes: providing a through silicon via die having an interconnect through a silicon substrate; depositing a re-distribution layer on the through silicon via die and connected to the interconnects; mounting a structure over the through silicon via die; connecting the structure to the interconnect of the through silicon via die with a direct interconnect; and encapsulating the through silicon via die and partially encapsulating the structure with an encapsulation.

REFERENCES:
patent: 6617681 (2003-09-01), Bohr
patent: 7279795 (2007-10-01), Periaman et al.
patent: 7723159 (2010-05-01), Do et al.
patent: 2007/0090508 (2007-04-01), Lin et al.
patent: 2007/0158809 (2007-07-01), Chow et al.
patent: 2008/0272504 (2008-11-01), Do et al.
Definition of “overhang”; “McGraw-Hill Dictionary of Scientific and Technical Terms, Sixth Edition”, 2003, pp. 1505-1506, Publisher: McGraw-Hill, New York.

Affiliated with

Also associated with

Rating

Integrated circuit packaging system having through silicon... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Integrated circuit packaging system having through silicon..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Integrated circuit packaging system having through silicon... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4173374