Integrated circuit packaging structure

Details Integrated circuit packaging structure Integrated circuit packaging structure

1999-07-02

2001-05-01

Wong, Don (Department: 2821)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

With contact or lead

C257S622000

Reexamination Certificate

active

06225691

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to an integrated circuit packaging structure and, in particular, to a packaging structure that can double the capacity of the memory without increasing the size of the package and the number of pins.
2. Description of the Prior Art
Memory plays a very important role in the computer mechanism. Accompanying the increasing speed of the central process unit (CPU), the memory has been prosperously developed so that, in recent years, it has overwhelmed the Moore rule, which states that the capacity will increase by a factor of four every two or three years. The capacity has rapidly evolved from 16 MB, 64 MB, 128 MB to 256 MB and is still evolving toward higher capacity.
The memory is also modularized in accord with the need of the computer industry. A usual 64 MB SDRAM module known in the prior art is composed by eight memory integrated circuits (IC), and every memory IC with 54 pins has only one memory chip. Therefore, it is indeed a waste that there is only placed on little chip in such a big package.
In observation of the disadvantages in the memory packaging structure according to the prior art that awaits for improvement, the inventor then made efforts in modifying and refining and finally succeeded in the invention of this integrated circuit packaging structure after many years of research and hard-working.
SUMMARY OF THE INVENTION
The present invention provides an integrated circuit packaging structure, which has independent implementation for the data buses among chips and parallel implementation for the address buses and control buses, and then encapsulates them into one package so as to double the capacity of the memory.
Furthermore, the instant invention provides an integrated circuit packaging structure, by which the efficiency of a memory IC can be effectively promoted and the inner space of the package can be more effectively utilized.
Yet, the invention provides an integrated circuit packaging structure, via which the capacity of the memory can be rapidly doubled and modularized, and can speed up the development of the memory industry.
The integrated circuit packaging structure with the above mentioned merits imbeds two or four memory chips into the concave structure formed by the upper and lower circuit boards, has independent data buses for each memory chip while makes address buses and control buses work in parallel, and finally encapsulates them within a single package in the expectation of enlarging the memory capacity without increasing the size of the package and the number of pins.


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