Integrated circuit packages

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Details

357 67, H01L 2328

Patent

active

H00000736

ABSTRACT:
A package for wire-bonded semiconductor integrated circuit chips is disclosed. The chip is covered by a protective layer of material such as room temperature vulcanizing silicone rubber. The thickness of the layer is such that it covers a portion of the arched wires, thereby concentrating the stresses away from the wire-ball bond interfaces. The chip is encapsulated in a plastic material while providing an air gap between the plastic and protective layer.

REFERENCES:
patent: 2850687 (1958-09-01), Hammes
patent: 3670091 (1972-06-01), Frantz et al.
patent: 3763403 (1973-10-01), Lootens
patent: 3839660 (1974-10-01), Stryker
patent: 4048670 (1977-09-01), Eysermans
patent: 4169271 (1979-09-01), Saitoh

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