Integrated circuit package with leadframe enhancement and...

Details Integrated circuit package with leadframe enhancement and... Integrated circuit package with leadframe enhancement and...

2006-09-19

2006-09-19

Pham, Hoai (Department: 2814)

Active solid-state devices (e.g., transistors, solid-state diode

Lead frame

C257S670000, C257S787000

Reexamination Certificate

active

07109570

ABSTRACT:
An integrated circuit package having a die pad and a plurality of leads is disclosed. At least one of the plurality of leads has a recess formed in a first face thereof. The package also has an integrated circuit chip coupled to the die pad through an adhesive layer. A plurality of wires each link a first face of the integrated circuit chip to one of the plurality of leads. An encapsulant encloses the integrated circuit chip, the plurality of wires, the die pad, and a portion of each of the plurality of leads. The encapsulant forms a plurality of side walls which slant downward and outward. At least one of the side walls intersects with the first face of the at least one lead within the side walls of the recess formed therein.

REFERENCES:
patent: 6197615 (2001-03-01), Song et al.
patent: 6841854 (2005-01-01), Itou et al.

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