Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead
Reexamination Certificate
2011-07-12
2011-07-12
Chu, Chris (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
With contact or lead
C257SE23043, C257S676000, C438S123000
Reexamination Certificate
active
07977782
ABSTRACT:
An integrated circuit package system includes: forming a lead having a both top contact portion and a bottom contact portion; connecting an integrated circuit die and the lead; and forming a package encapsulation, having a top side and a bottom side, over the integrated circuit die. The forming the package encapsulation includes partially exposing the top contact portion at the top side, and partially exposing the bottom contact portion along the bottom side with the bottom contact portion extending beyond a nonhorizontal portion of the package encapsulation.
REFERENCES:
patent: 5197183 (1993-03-01), Chia et al.
patent: 5394010 (1995-02-01), Tazawa et al.
patent: 5554886 (1996-09-01), Song
patent: 5744827 (1998-04-01), Jeong et al.
patent: 5770888 (1998-06-01), Song et al.
patent: 6337510 (2002-01-01), Chun-Jen et al.
patent: 6392295 (2002-05-01), Iwaya et al.
patent: 6420779 (2002-07-01), Sharma et al.
patent: 6455348 (2002-09-01), Yamaguchi
patent: 6459148 (2002-10-01), Chun-Jen et al.
patent: 6559526 (2003-05-01), Lee et al.
patent: 6803648 (2004-10-01), Kelkar et al.
patent: 7023076 (2006-04-01), Khiang
patent: 7193298 (2007-03-01), Hong et al.
patent: 7227249 (2007-06-01), Chiang
patent: 7615859 (2009-11-01), Kim et al.
patent: 7714416 (2010-05-01), Bauer et al.
patent: 7714419 (2010-05-01), Camacho et al.
patent: 7719094 (2010-05-01), Wu et al.
patent: 2003/0132512 (2003-07-01), Yasuda et al.
patent: 2005/0026325 (2005-02-01), Koon et al.
patent: 2005/0186711 (2005-08-01), Yee et al.
patent: 2006/0035414 (2006-02-01), Park et al.
patent: 2007/0063322 (2007-03-01), Chow et al.
patent: 2008/0036051 (2008-02-01), Espiritu et al.
Camacho Zigmund Ramirez
Caparas Jose Alvin
Pisigan Jairus Legaspi
Tay Lionel Chien Hui
Chu Chris
Ishimaru Mikio
Stats Chippac Ltd.
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