Integrated circuit package including sealed gaps and...

Details Integrated circuit package including sealed gaps and... Integrated circuit package including sealed gaps and...

2002-09-30

2004-08-10

Fahmy Jr., Wael (Department: 2814)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Metallic housing or support

C257S706000, C257S708000, C257S710000

Reexamination Certificate

active

06773964

ABSTRACT:

FIELD OF THE INVENTION
The invention relates to integrated circuit (IC) electronic packages including moisture vents and methods of manufacturing such packages.
BACKGROUND OF THE INVENTION
Electronic devices utilizing semiconductor chips are mounted on substrates that physically support the chips and electrically transmit signals between the chips and other elements of the circuit. One prior art method of attaching such chips to substrates includes attaching a chip with a bumped surface to a substrate (e.g., a flip-chip), utilizing an underfilling to fasten the bumped chip to the substrate. A heat spreader is attached above the chip and the to dissipate heat generated during the operation of the electronic device. This configuration will herein be referred to as an IC package.
FIG. 1
depicts an IC package according to the prior art. Chip
10
is attached to substrate
11
(i.e., formed from flex, plastic material, etc.) with an underfilling
12
. Heat spreader
13
is mounted above chip
10
. IC package
15
is attached to, for example, a printed circuit board using solder balls
14
. This attachment requires high temperature (e.g., 220° C. for eutectic solder, and even higher temperatures for lead-free solder), which can vaporize any trapped moisture in gaps
16
within IC package
15
and expand any gasses trapped in gaps
16
as well. Moisture trapped in gaps
16
can be the result of moistures that absorbed in plastic materials of the IC package, such as substrate
11
, underfilling
12
, and various adhesives.
High vapor pressure in gaps
16
may cause delamination and debonding of heat spreader
13
from IC package
15
, as shown in FIG.
2
. The vapor
3
trapped inside gaps
16
overcomes the mechanical bonding strength of an adhesive, which no longer holds heat spreader
13
down. The vapor
3
is then suddenly released. This is commonly referred to in the art as the “popcorn effect.” The vapor pressure may also cause other failures such as the delamination and debonding between chip
10
and spreader
13
, chip
10
and underfilling
12
, underfilling
12
and substrate
11
, as well as stiffener
32
and substrate
11
.
Prior art solutions to this dilemma, such as U.S. Pat. No. 6,215,180, herein incorporated by reference, mitigate the popcorn effect by including apertures in the heat spreader layer, or in the substrate itself. Pressure buildup in the gaps is avoided because the apertures expose the vapor in the gaps to the ambient environment, thus preventing the popcorn effect. However, prior art apertures suffer from the limitation that they serve to allow vapor to escape only so long as they are exposed to the ambient environment. Often, subsequent dispensing of layers, such as adhesives or additional heat spreaders, cover or fill the apertures sealing the gaps in the IC package. As a result, remaining moisture may be heated in process steps subsequent to the gaps being sealed, and the popcorn effect may still occur.
Other prior art solutions include using a vapor permeable heat spreader and relying on mechanical strength or flexibility of a heat spreader or adhesive layer to counteract an excess of vapor pressure. Both of these techniques require costly, non-conventional heat spreader configurations and materials. Further, these prior art solutions may be subject to the popcorn effect because the vapor pressure may still exceed the permeability of the heat spreader or the interfacial mechanical strength of adhesives.
Accordingly, it would be desirable for an IC package to include a means for relieving vapor pressure which does not suffer from the prior art limitations.
SUMMARY OF THE INVENTION
The need for an IC package that prevents the popcorn effect through every process step in forming an electronic device, as well as during operation of the device is met by including, in one aspect, a method of manufacturing an integrated circuit package includes several steps. The first step is attaching a semiconductor chip to a substrate which includes stiffener. The second step includes dispensing an adhesive layer atop the stiffener. The third step includes attaching a heat spreader to the adhesive layer. In addition, the step of dispensing of the adhesive layer includes the step of generating at least one via by dispensing the adhesive layer in a pattern which permits releasing vapor trapped in the integrated circuit package after the attachment of the heat spreader.
In another embodiment, the via allows the release of vaporized moisture during solder reflow. In another embodiment, the release of vapor occurs during an initial period of solder reflow where the vapor pressure in gaps
16
exceeds the ambient vapor pressure during temperature elevation during solder reflow. In another embodiment, the release of vapor occurs continuously in the course of solder reflow.
In another embodiment, the at least one via extends laterally through the adhesive layer between the heat spreader and the stiffener. In another embodiment, the at least one via extends through the integrated circuit package to a side exterior surface of the IC package.
In another embodiment, the step of generating at least one via further includes using a stencil to create the pattern enabling the release of moisture after the attachment of the heat spreader.
In another aspect of the invention, a method of manufacturing an integrated circuit package includes several steps. The first step includes attaching a semiconductor chip to a substrate which includes stiffener. The next step includes dispensing a first adhesive layer atop the stiffener. The subsequent step includes dispensing a second adhesive layer atop the semiconductor chip, followed by a step of attaching a heat spreader to the first and second adhesive layers. In addition, the step of dispensing the first adhesive layer further includes the step of generating at least one via by dispensing the first adhesive layer in a pattern which permits releasing vapor trapped in the integrated circuit package after the attachment of the heat spreader.
In another embodiment, the first adhesive layer is a structural adhesive layer, and the second adhesive layer is a thermal adhesive layer.
In another aspect of the invention, an integrated circuit package includes a substrate which includes a stiffener, a semiconductor chip attached to the substrate, an adhesive layer atop the stiffener, and a heat spreader attached to the thermal adhesive and structural adhesive layers. In addition, the adhesive layer forms at least one via for releasing vapor.
In another aspect of the invention, an integrated circuit package includes a substrate which includes a stiffener, a semiconductor chip attached to the substrate, a first adhesive layer atop the stiffener, a second adhesive layer atop the semiconductor chip, and a heat spreader attached to the first and second adhesive layers. In addition, the first adhesive layer forms at least one via for releasing vapor.
The invention provides many advantages that are evident from the following description, drawings, and claims.


REFERENCES:
patent: 4866506 (1989-09-01), Nambu et al.
patent: 5008062 (1991-04-01), Anderson et al.
patent: 5248848 (1993-09-01), Kronowski et al.
patent: 5296738 (1994-03-01), Freyman et al.
patent: 5767446 (1998-06-01), Ha et al.
patent: 6014318 (2000-01-01), Takeda
patent: 6054755 (2000-04-01), Takamichi et al.
patent: 6215180 (2001-04-01), Chen et al.
patent: 6232652 (2001-05-01), Matsushima
patent: 6358780 (2002-03-01), Smith et al.
patent: 2001/0013640 (2001-08-01), Tao
patent: 9735342 (1997-09-01), None
U.S. patent application Ser. No. 2001-013640, Tao, filed Aug. 16, 2001.

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