Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings
Reexamination Certificate
2001-08-16
2002-11-05
Chaudhuri, Olik (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
Multiple housings
C257S723000, C257S773000
Reexamination Certificate
active
06476476
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to packages for integrated circuits.
BACKGROUND
In the field of integrated circuit packaging, it is known to include a plurality of integrated circuits (also called chips or semiconductor chips) in a single package body. Including a plurality of integrated circuits in one package allows an increase in the package density and function without a significant increase in the area of a printed circuit board that is occupied by the package upon mounting thereon.
A significant disadvantage of conventional packages, even those including a plurality of integrated circuits, is that further increases in package density per unit area of the printed circuit board are not easily attainable. For example, if a package includes two sixteen megabit memory integrated circuits (for a total of thirty-two megabits), then increasing the total amount of memory to 128 megabits would require additional area on the printed circuit board to mount three additional thirty-two megabit packages.
Artisans have attempted to address this disadvantage by stacking separate packages on top of each other to conserve the area of printed circuit boards. Conventional stacking methods, however, require that the packages be soldered together. This can be difficult due to a need to accurately align the package, and maintain the alignment, prior to soldering. Moreover, separating the stacked, soldered packages without damaging them is difficult.
Accordingly, packages with improved stacking capabilities are desirable.
SUMMARY OF THE INVENTION
The present invention includes integrated circuit packages that may be easily stacked upon another similarly constructed package so as to form electrical and physical connections with the other package. The stacked packages may contain the same or different types of integrated circuits. For example, two packages with memory chips may be stacked, or a package including a memory chip may be stacked with a package including a microprocessor chip. The package design provides the user with flexibility in deciding how many and what types of packages to stack. The package design also increases the functionality of a given area of a printed circuit board, or other mounting substrate, upon which the packages are stacked.
In accordance with one embodiment of the present invention, a substrate for such an integrated circuit package includes a molded plastic body including an integrated circuit mounting region, and a plurality of metal coated barrels each extending vertically and integrally from the body. The substrate also includes a plurality of metal coated pins each extending vertically and integrally from the body and aligned co-axially with a respective one of the barrels. At least some of the metal coated barrels are electrically coupled to respective ones of the metal coated pins. The substrate also includes a plurality of electrically conductive traces each electrically coupled to at least one metal coated barrel.
In accordance with another embodiment of the present invention, an integrated circuit package using an embodiment of the above-described substrate includes an integrated circuit mounted on the body and electrically coupled to at least some of the traces. The integrated circuit may be electrically coupled to the traces by a plurality of bond wires. The integrated circuit may be encapsulated, at least in part, by an encapsulant material.
Another embodiment of the present invention includes a stack of integrated circuit packages. The stack includes a first integrated circuit package including a first integrated circuit mounted on a first molded plastic body. The first molded plastic body includes a plurality of integral metal coated barrels each electrically coupled to the first integrated circuit. The stack also includes a second integrated circuit package including a second integrated circuit mounted on a second molded plastic body. The second molded plastic body includes a plurality of integral metal coated pins each electrically coupled to the second integrated circuit. The first and second integrated circuit packages are stacked, and the pins of the second integrated circuit package are within, and electrically coupled to, respective ones of the barrels of the first integrated circuit package.
The present invention also includes a mounting substrate upon which one or more of the above-described integrated circuit packages may easily be mounted. The mounting substrate includes a molded plastic sheet, a plurality of metal coated barrels each extending vertically and integrally from the sheet, and an electrically conductive connector extending from the sheet. The connector is adapted to couple the substrate, electrically and physically, to circuitry external to the substrate. The mounting substrate also includes a plurality of electrically conductive traces each electrically coupled at first ends to respective metal coated barrels. At least some of the traces are electrically coupled at opposite second ends to the electrically conductive connector.
In an exemplary embodiment of a method of making the above-described integrated circuit package a molded plastic substrate is provided. The substrate includes a plurality of metal coated barrels, each extending vertically and integrally from a body of the substrate. The substrate also includes a plurality of electrically conductive traces on the body, each electrically coupled to at least one metal coated barrel. An integrated circuit is mounted on the body, and electrically coupled to at least some of the traces. In some embodiments, the molded plastic substrate may include a plurality of interconnected package sites arranged in an array, so that a plurality of packages may be fabricated in parallel and then singulated.
The present invention is best understood by reference to the following detailed description when read in conjunction with the accompanying drawings.
REFERENCES:
patent: 5579207 (1996-11-01), Hayden et al.
patent: 6093209 (2000-07-01), Kwon et al.
patent: 6278284 (2001-08-01), Mori et al.
Amkor Technology Inc.
Chaudhuri Olik
Date Celisa
Nguyen DiLinh
Parsons James E.
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