Integrated circuit package in which impendance between signal pa

Details Integrated circuit package in which impendance between signal pa Integrated circuit package in which impendance between signal pa

1992-10-19

1994-07-19

Crane, Sara W.

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified material other than unalloyed aluminum

257700, 257701, 257734, 257750, 257752, H01L 2348, H01L 2946, H01L 2302, H01L 3902

Patent

active

053312040

ABSTRACT:
An object of the present invention is to match impedance of each portion of whole lines of a signal wiring with the integrated circuit mounted on the package. All ground planes are deleted within a region vertically under/above a connection pad provided on the top- or bottom-surface of a polyimide multilayer part, whereby no capacitance is generated between the connection pad and the ground planes, so that the impedance of the signal wiring within the region right under/above the connection pad is prevented from being lowered.

REFERENCES:
patent: 4705917 (1987-11-01), Gates, Jr. et al.
patent: 5008734 (1991-04-01), Dutta et al.
patent: 5198693 (1993-03-01), Imken et al.
"A Multi-chip Packaged CaAs 16.times.16 Bit Parallel Multipler," T. Sekiguchi et al., Optoelectronics Laboratories, Jul. 30, 1990, pp. 1-4.
The International Journal for Hybrid Microelectronics, Special Issue on the 1981 International Microelectronics Symposium, vol. 4, No. 2, Oct., 1981, pp. 289-295.
"Analysis of Characteristics of the Shielded-Coplanar Waveguide by Conformal Mapping Method," Y. Nougchiii et al., vol. J60-B, No. 8, Aug. 1977, pp. 561-566.

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