Integrated circuit package having stress reducing recesses

Details Integrated circuit package having stress reducing recesses Integrated circuit package having stress reducing recesses

1992-11-02

1994-05-03

Hille, Rolf

Active solid-state devices (e.g., transistors, solid-state diode

Encapsulated

257730, H01L 2328

Patent

active

053090268

ABSTRACT:
An integrated circuit device has reduced stress concentration on the IC chip for prevention of package cracks in the device. Recessed portions are formed in the package at positions corresponding to at least the corner portions of the IC chip to reduce the stress concentration generated at the corner portions of the IC chip.

REFERENCES:
patent: 4855807 (1989-08-01), Yamaji et al.
patent: 4887149 (1989-12-01), Romano

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