Integrated circuit package having reduced interconnects

Details Integrated circuit package having reduced interconnects Integrated circuit package having reduced interconnects

2005-12-27

2005-12-27

Wilczewski, Mary (Department: 2822)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Chip mounted on chip

C257S734000, C257S780000, C257S784000

Reexamination Certificate

active

06979904

ABSTRACT:
A technique for making an integrated circuit package. Specifically, a stacked memory device is provided with minimal interconnects. Memory die are stacked on top of each other and electrically coupled to a substrate. Thru vias are provided in the substrate and/or memory die to facilitate the electrical connects without necessitating a complex interconnect technology between each of the interfaces. Wire bonds are used to complete the circuit package.

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