Integrated circuit package having a substrate vent hole

Electricity: electrical systems and devices – Housing or mounting assemblies with diverse electrical... – For electronic systems and devices

Reexamination Certificate

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Details

C361S764000, C361S820000, C257S778000, C257S737000, C257S738000, C029S841000, C438S063000, C438S064000

Reexamination Certificate

active

06490166

ABSTRACT:

BACKGROUND
1. Field of the Invention
This invention relates in general to an integrated circuit package, and more particularly, to an integrated circuit package having a substrate vent hole.
2. Description of Related Art
Integrated circuits are typically assembled into a package that is soldered to a printed circuit board.
FIG. 1
illustrates a type of integrated circuit package that is commonly referred to as flip chip of C
4
package. The integrated circuit
1
contains a number of solder bumps
2
that are soldered to a top surface of a substrate
3
.
The package may include an underfill material
4
that is located between the integrated circuit
1
and the substrate
3
. The underfill material
4
is typically an epoxy which strengthens the solder joint reliability and the thermo-mechanical moisture stability of the IC package.
The package may have hundreds of solder bumps
2
arranged in a two-dimensional array across the bottom of the integrated circuit
1
. The epoxy
4
is typically applied to the solder bump interface by dispensing a single line of uncured epoxy material along one side of the integrated circuit. The epoxy then flows between the solder bumps. The epoxy then flows between the solder bumps. The epoxy must be dispensed in a manner that covers all of the solder bumps
2
.
It is desirable to dispense the epoxy
4
at only one side of the integrated circuit to insure that air voids are not formed in the underfill. Air voids weaken the structural integrity of the integrated circuit/substrate interface. Such air voids are typically formed from trapped air or from gasses released during the underfill cure process. Moisture released during the underfill process may also be absorbed by the substrate, resulting in delamination and other reliability-related failures during the surface mount process. Moreover, the bumps may extrude into the voids during thermal loading, particularly for packages with a relatively high bump density.
Accordingly, there is a need in the technology for an apparatus and method for providing an integrated circuit package that avoids the aforementioned problems.
SUMMARY
The present invention involves a method of providing an integrated circuit package having a substrate with a vent opening. The integrated circuit package includes a substrate having an opening and an integrated circuit mounted to the substrate. An underfill material is dispensed between the substrate and the integrated circuit.


REFERENCES:
patent: 5173766 (1992-12-01), Long et al.
patent: 5218234 (1993-06-01), Thompson et al.
patent: 5311059 (1994-05-01), Banerji et al.
patent: 5313365 (1994-05-01), Pennisi et al.
patent: 5385869 (1995-01-01), Liu et al.
patent: 5450283 (1995-09-01), Lin et al.
patent: 5473512 (1995-12-01), Degani et al.
patent: 5612576 (1997-03-01), Wilson et al.
patent: 5721450 (1998-02-01), Miles
patent: 5766982 (1998-06-01), Akram et al.
patent: 6038136 (2000-03-01), Weber
patent: 2320612 (1998-06-01), None
patent: 0805486 (1997-11-01), None

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