Integrated circuit package for flip chip

Details Integrated circuit package for flip chip Integrated circuit package for flip chip

1998-04-13

2001-02-06

Kincaid, Kristine (Department: 2831)

Electricity: conductors and insulators

Boxes and housings

Hermetic sealed envelope type

C257S724000, C257S778000

Reexamination Certificate

active

06184463

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to an integrated circuit package for flip chips and, more particularly, to an integrated circuit package and method of forming the integrated circuit package using a ceramic substrate for receiving a flip chip.
BACKGROUND OF THE INVENTION
Large scale integrated circuit chips have many input and output connections. In order to accommodate the many connections, manufacturers have produced leadless chip carriers that use a wire bonding process. However, a wire bonding process can be expensive. In order to reduce the complexity and expense of a wire bonding process, manufacturers have increasingly used flip chip technology.
In a flip chip, an integrated circuit carries a pad arrangement on the top surface and is turned upside down (i.e., flipped), thus allowing direct coupling between the pads and matching contacts on the main circuit board or chip carrier. In a typical flip chip, solder or gold bumps are formed on the integrated circuit input/output terminals. The flip chip is directly bonded to a chip carrier or other structure by a solder connection.
U.S. Pat. No. 5,019,673 to Juskey, et al. discloses a flip chip package for integrated circuits that allows flip chip removal for ready testing and/or replacement. In the '673 patent, a flip chip package includes an over-molding of an integrated circuit assembly. A flip chip is mounted to a thin chip carrier. The flip chip includes an array of bumped pads, which fill an array of matching conductive through holes on the chip carrier. The chip carrier includes an array of bumped contacts on its back surface, which corresponds to bumped pads of the flip chip. The transfer over-molding of the integrated circuit assembly provides a layer of epoxy around the exposed surfaces of the flip chip, thus allowing an environmentally protected and removable integrated circuit package.
Although the structure does provide a removable flip chip package, processing requirements, such as microwave systems, require even greater space saving structures and manufacturing techniques that are efficient and low cost. The requirements for increased miniaturization of low volume and proprietary systems has generated a need for increased density of active devices, such as flip chips. A process for implementing flip chip packaging on a die, such as a mimic die, is not available because of grounding difficulties. This is seen especially with galium arsenide devices having an air bridge. It is also difficult to under fill these types of flip chips because of the shorting problems. Additionally, these types of chips also require grounding on the back side.
SUMMARY OF THE INVENTION
It is, therefore, an object of the present invention to provide an integrated circuit package and method of forming same that allows flip chip packaging such that dies can be mounted in a relationship for same space packaging and increased density.
In accordance with the present invention, an integrated circuit package includes a ceramic substrate having a cut out configured to receive a flip chip. The cut out includes vias forming through holes. A flip chip is received within the cut out of the ceramic substrate and has conductive bumps formed thereon corresponding to the electrical contact pads of the flip chip. The conductive bumps are received within the through holes in the ceramic substrate. The through holes are also plated with a conductive ink. A controlled impedance line is secured to the conductive bumps by adhesive means, such as conductive epoxy, and acts as a simulated coax.
A second integrated circuit chip is mounted back-to-back on the flip chip received within the cut out. The flip chip and second integrated circuit chip are grounded together, such as by conductive epoxy. In accordance with one aspect of the present invention, the flip chip and second integrated circuit chip are stepped in configuration. Conductive bumps are formed as epoxy having a conductive material impregnated therein.
In still another aspect of the present invention, the integrated circuit package comprises a ceramic substrate having a cut out, which includes through holes. A flip chip is received within the cut out of the ceramic substrate and has conductive bumps formed thereon which are received through the through holes of the ceramic substrate. A heat sink is mounted on the flip chip. A second integrated circuit can be mounted on the heat sink and the second integrated circuit and can be electrically connected to conductive patterns formed on the ceramic substrate. The second integrated circuit is also grounded to the flip chip.
In a method aspect of the present invention for forming an integrated circuit package, the steps comprise forming a ceramic substrate having a cut out configured to receive a flip chip wherein the cut out includes through holes. The method further comprises forming conductive bumps onto a flip chip that correspond to the electrical input/output contacts of the flip chip, and receiving the flip chip within the cut out of the ceramic substrate so that the conductive bumps are received within the through holes of the ceramic substrate. The method also includes securing a controlled impedance line to the conductive bumps. In still another aspect of the present invention, the method comprises mounting a second integrated circuit chip on the flip chip in back-to-back relationship and grounding together the flip chip and second integrated circuit chip, such as by an adhesive epoxy. The method can further comprise mounting a heat sink on the flip chip followed by mounting a second integrated circuit chip on the heat sink.


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